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5 4 3 2 1

E/VMARR_Pine trail-D Block Diagram


Clock Generator
CK-505
PI010L/Marr-AIO
PAGE TITLE Quantity
RTM875N-606 Intel BOARD NO: 09194-1 01 COVER PAGE
D PINEVIEW-D DATE: 2010/06/24 02 POWER DELIVERY CHART D

Atom D525 03 CLOCK/RESET MAP


04 POWER MAP
(1.8G 1M) 05 GPIO TABLE
SINGLE CHANNEL 2 x
SO-DIMM
DDR3 800MHz
RGB CRT
SCALAR LVDS
06 CLOCK GENERATOR
DDR3
Channel A INTEGRATED GRAHPICS Realtek RTD2270 LCD Panel 07 CPU PINEVIEW:DMI&EXP/ VGA/VSS
Support memory type only
DDR3 LVDS 08 CPU PINEVIEW:DDR3
1R x8 CRT I/F 09 CPU PINEVIEW:LVDS/CPU SB/DEBUG
10 CPU PINEVIEW:POWER

LVDS
2Rx16
11 DDR3 DIMMA & B
DMI BUS
12 DDR3 DECOPULING
AUDIO
PCIE SLOT X 1 13 LVDS RTD2270
HP OUT NVIDIA 14 GPU NV GT218-ILV
CODEC PCI_E
HDA GT218-ILV 15 TP DMI/ PCIE/ USB
MIC IN ALC269 VB2 Intel 16 TP HOST/ SATA
TIGERPOINT 17 TP GPIO/ SPI/ LPC/ RTC
Line OUT Giga LAN 18 TP POWER/ GND
USB 2.0 (2+2+2+2) PCI_E
RTL 8111E
Rear IO 19 USB CONNECTOR
LAN Connect I/F (LCI) RJ45 CONN. 20 LAN_RTL8111E
C

2W x 2
AC97 2.3/Azalia Interface 21 AUDIO CODEC ALC269 C

INTERNAL SPK
Ultra ATA/100/66/33 22 SATA/ XPD-SSA/DEBUG PORT
Serial ATA 150MB/s 23 SIO ITE8758/FAN/PS2 KBMS
ACPI 2.0
PCI_E mini-PCIE SLOT X 1
24 MINI-PCIE SLOT
Flash ROM SPI
LPC I/F 25 CARD READER JMB385C
8Mb PCI Rev 2.3
SD
26 19VDC POWER JACK
PCI Express
SDHC 27 S5_1W/ LED/ HOLES
INT. RTC
PCI_E
Card Reader MMC 28 RT8205A_3V&5V
Controller MS 29 RT8209A_DDR1D5V/1D05V
INTERNAL
USB 0 JMB385 MS PRO 30 RT8209A_GPU CORE
MS HG 31 NCP5380_VCORE
SATA

(WEBCAM) LPC Bus / 33MHz


INTERNAL
USB 1 (TOUCH USB 2.0 Total:
PANEL) SATA1 TPM SIO
INTERNAL
SATA2 ITE IT8758E
USB 2 (mini-PCIE
SLOT) BOM PARAMETER
B
Rear IO CPU FAN PS2
G: GPU GT218-ILV B

USB x 2
CONN(3,4)
KB/MS
S: SCALAR RTD2270 EMARR_H: G, N
USB 2.0
USB x 1 A: SUPPORT ASF 2.0 EMARR_L: S, N
CONN(5)
N: Non SUPPORT ASF 2.0 VMARR: S, A, V
R: Unmount
Side I/O
USB x 2
USB 2.0
E: EUP
CONN(6,7)
V: V-Marr
D: D-SUB

A A

Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Title
COVER PAGE
Size Document Number Rev
C AIO eMARR 1A

Date: Tuesday, June 29, 2010 Sheet 1 of 31


5 4 3 2 1
5 4 3 2 1

POWER ADAPTER VCORE (8A)


NCP5380
DCBATOUT +1.1V CPU
Phase 1
NTD4809N NMOS VCORE
ADP_19V TO-252 14m ohm VCORE VCORE +1.1V 8A
V_1P05_CORE
NTD4806N NMOS V_1P05_CORE 5.34A
TO-252 9.4m ohm VCCA
VCCA 1.5V 0.11A
V_SM
V_SM 2.27A
D RT8205A D
V_1P8_PLLSFR
5V_S5 VCC5(6.5A) VCC5 V_1P8_PLLSFR 0.43A
ADP_19V
AO4468 NMOS AO4468 AO4468 VCC_GIO
SO-8 22m ohm 5V_S5 5V_S0 5V_S5 VCC5_USB VCC_GIO 0.01A
NMOS SO-8 NMOS SO-8
AO4718 NMOS 14mohm 9.2A 14mohm 9.2A
SO-8 14m ohm SLP_S3_N SLP_S4_N

SB
3D3V_S5 VCC3_3 (4A) Vcc1.05V
AO4468 NMOS 5V_S0 Vcc1.05V 0.98A
SO-8 22m ohm CPU Fan
3D3V_S5 AO4468 3D3V_S0 Vcc1_5_V
Vcc1_5_V 1.41A
AO4718 NMOS NMOS SO-8 WEBCAM
SO-8 14m ohm 14mohm 9.2A VCC3_3
VCC3_3 0.29A
Touch Panel (Option)
SLP_S3_N V5REF
V5REF 0.006A
3D3V_S0 VCCSus3_3
SIO ITE8755 VCCSus3_3 0.13A
V5REF_Sus
V5REF_Sus 0.01A
MEMORY POWER (18A) LAN RTL8111E
VccRTC
+1.8V RT8209A CLK GEN VccRTC 0.014A
ADP_19V +0.9V (1A) RTM875N-605
NTD4809N NMOS
C
TO-252 14m ohm VCC_MEM_1P5 APL5336 C
MEM_VTT BIOS ROM
5V_S5 LDO SO-8 1.5A DDR2 2 DIMM
NTD4806N NMOS
TO-252 9.4m ohm 1394/Card reader VCC_MEM_1P8
V_SM 1.0A
VT6325 MEM_VTT
CORE POWER V_SM_VTT 0.3A
+1.5V LVDS RTL2270
AO4468
NMOS SO-8 (2.5A) AUDIO ALC269 Mini PCI Express Slot x 1
3D3V_S0
14mohm 9.2A NM10 V_SM 1.0A

OP
V_1P5_CORE
Vinafix V_1P5_CORE
V_SM_VTT 0.3A

AO4468
NMOS SO-8 (2A)
14mohm 9.2A GPU GT218-ILV
GT218 CORE POWER V_1P5_MEM
0.9V RT8209A
B B
ADP_19V
NTD4809N NMOS
TO-252 14m ohm (11.3A)
GPU GT218-ILV
NTD4806N NMOS
TO-252 9.4m ohm V_0P9_CORE

+1.05V
AO4468
NMOS SO-8
V_1P05_CORE (6.5A)
14mohm 9.2A NM10
V_1P05_CORE
OP

(0.72A)
GPU GT218-ILV
V_1P05
A A

Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Title
POWER DELIVERY CHART
Size Document Number Rev
C AIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 2 of 31


5 4 3 2 1
5 4 3 2 1

CK 505
3.3 VOLT
CK_PWRGD
32.768KHZ
CRYSTAL RTCX1
32.768KHZ SMBCLK SCLK
RTCX2 AUDIO CODEC
24MHZ
PCI PCIF5 PCICLK ACZ_BCLK
D D
BCLK
PLTRST_N
GLUE LOGIC TIGERTPOINT PLTRST_N
PLTRSTB
33MHZ ICH_RSMRST_N
RSMRST#
PCI0 33MHZ LRESET# PWRGD_3V CPUPWRGOOD
RSMRST#
VRMPWRGD VCC3
PCICLK DMICLK100N
USB UCB48
48MHZ
CLKIN SIO PWRGD_3V DMICLK100P
PWROK PWROK
SATACLKN
CLK48
REF 14MHZ SATACLKP
REF CLK14

100MHZ
SRC2
100MHZ
SRC2*
100MHZ
SRC3
100MHZ
SRC3*
100MHZ
SRC5 CK_100M_XDP_DP
C C
100MHZ
SRC5* CK_100M_XDP_DPN
XDP_SSA SCLK
CRYSTAL

100MHZ
14.318 MHZ SRC7 XDP_H_CLK_DP
SRC 100MHZ XDP_H_CLK_DN
SRC7* XDP_PWRGD
100MHZ
SRC6 REFCLKP LAN
SRC6*
100MHZ
REFCLKN RTL8111E
96MHZ XTAL1 CRYSTAL
SRC0 DPL_REFCLKINP
XTAL2 25MHZ
96MHZ
SRC0* DPL_REFCLKINN
100MHZ RSTIN# PLTRST_N
SRC1 DPL_REFSSCLKINP
100MHZ H_PWRGD
SRC1* DPL_REFSSCLKINN CPUPWRGOOD
100MHZ
SRC4 EXP_CLKINP

SRC4*
100MHZ
EXP_CLKINN CHAN A SCLK
DIMM0
100/133/166/200 MHZ
PNV
667/800

B B
CPU0* BCLKN
100/133/166/200 MHZ
CPU0 BCLKP
HOST SCLK
CPU1*
100/133/166/200 MHZ
HPL_CLKINN CHAN A
100/133/166/200 MHZ DIMM1
CPU1 HPL_CLKINP
PWROK

CPU_ITP* 100/133/166/200 MHZ PWRGD_3V

CPU_ITP 100/133/166/200 MHZ

A A

Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Title
CLOCK/RESET MAP
Size Document Number Rev
C AIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 3 of 31


5 4 3 2 1
5 4 3 2 1

CPU POWER CONN


PWM NTD4809*1 VCORE
DC_19_IN 5V_USB
NCP5380 NTD4806*1 Imax=8A
Imax=4.0A

1 Phase Design

D
PWM AO4468*1 5V_PWR 5V_S5 N-MOS 5V_S0 D

RT8205A AO4718*1 Imax=6.5A Imax=6.5A AO4468 Imax=6.5A

AO4468*1 3D3V_PWR 3D3V_S5 N-MOS 3D3V_S0


AO4718*1 Imax=4A Imax=4A AO4468 Imax=4A

1 Phase Design
VCC_MEM_1P8
PWM NTD4809*1 1.8V 1D8V_S3 LDO MEM_VTT
RT8209AGQW NTD4806*1 Imax=17A Imax=17A APL5336 Imax=1A

1 Phase Design
1.5V V_1P5_CORE
OP AO4468*1 Imax=2.5A Imax=2.5A

1.05V V_1P05_CORE
OP AO4468*1 Imax=6.5A Imax=6.5A
C C

POWER ON SEQUENCE
99ms
PWROK

VRMOK
20ms

VCORE
110us

V_1P1_VTT

ICH1.5V
B B

V_SM

+12/VCC/VCC3

SLP_S3_N

SLP_S4_N

10ms
RSMRST#

0ms
VccSus1_05
0ms

VccSus3_3
A A

V5REF_Sus 0ms

RTCRST#
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai W u Rd
Hsichih, Taipei Hsien
VccRTC
18ms Title
RESET & POWER MAP
Size Document Number Rev
D AIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 4 of 31


5 4 3 2 1
5 4 3 2 1

PCH TIGERPOINT
PIN
POWER Default DURING Default S5 -> LAN_PWR_ON -> LOW
NAME PIN# WELL USAGE Type RESET Setting NOTES S4, S3, S0 -> LAN_PWR_ON -> HIGH
GPIO0 T15 MAIN PANEL_DET I/O H Multiplexed with BM_BUSY#.
D GPIO1 C9 MAIN SPK_MUTE_N I/O H Unmultiplexed. D

GPIO2 E8 MAIN P_INTE_N I/OD H Multiplexed with PIRQ[H:E]#.


GPIO3 D6 MAIN P_INTF_N I/OD H Multiplexed with PIRQ[H:E]#.
GPIO4 H8 MAIN P_INTG_N I/OD H Multiplexed with PIRQ[H:E]#.
GPIO5 F8 MAIN P_INTH_N I/OD H Multiplexed with PIRQ[H:E]#.
GPIO6 W16 MAIN W1_DETECT_N I/O H Unmultiplexed.
GPIO7 W14 MAIN W2_DETECT_N I/O H Unmultiplexed.
GPIO8 K18 RESUME PANEL_SEL1 I/O H Unmultiplexed.
GPIO9 H19 RESUME PANEL_SEL2 I/O H Unmultiplexed.
GPIO10 M17 RESUME PANEL_SEL3 I/O H Unmultiplexed.
GPIO11 E20 RESUME SMB_ALERT_PU I/O H Multiplexed with SMBALERT#
GPIO12 A24 RESUME P_GPIO12 I/O H Unmultiplexed.
GPIO13 C23 RESUME PME_N I/O H Unmultiplexed.
GPIO14 P5 RESUME TS_RADY I/O H Unmultiplexed. 7/9
GPIO15 E24 RESUME P_GPIO15 I/O L Unmultiplexed.
C C
GPIO16 N/A N/A Not Implemented
GPIO17 A2 MAIN P_GPIO17 I/O L Multiplexed with BM_BUSY#.
GPIO18 N/A N/A Not Implemented
GPIO19 N/A N/A Not Implemented
GPIO20 N/A N/A Not Implemented
GPIO21 N/A N/A Not Implemented
GPIO22 C15 MAIN Panel_FB I/O H Unmultiplexed.
GPIO23 AA5 MAIN L_DRQ1_N I/O Multiplexed with LDRQ1#
GPIO24 R3 RESUME LAN_PWR_ON I/O H Unmultiplexed. Not cleared by CF9h reset event.
GPIO25 C24 RESUME TPEV_P_GPIO25 I/O L Unmultiplexed.
GPIO26 D19 RESUME ISPWT_EN_R I/O H Unmultiplexed.
GPIO27 D20 RESUME SUSLED_N I/O H Unmultiplexed.
GPIO28 F22 RESUME PWRLED_N I/O H Unmultiplexed.
GPIO29 E6 RESUME –USB_OC57 I/O H Multiplexed with OC5#
B B
GPIO30 C2 RESUME –USB_OC36 I/O H Multiplexed with OC6#
GPIO31 C3 RESUME –USB_OC57 I/O H Multiplexed with OC7#
GPIO32 N/A N/A Not Implemented
GPIO33 U14 MAIN W1_DISABLE_N I/O Unmultiplexed.
GPIO34 AC1 MAIN W2_DISABLE_N I/O Unmultiplexed.
GPIO35 N/A N/A Not Implemented
GPIO36 AD23 MAIN AUTO_COLOR_SIO I/O Unmultiplexed.
GPIO37 N/A N/A Not Implemented
GPIO38 AC23 MAIN TOUCH_EN I/O H Unmultiplexed.
GPIO39 AC24 MAIN CAMERA_EN I/O H Unmultiplexed.
GPIO40 N/A N/A Not Implemented.
GPIO41 N/A N/A Not Implemented.
GPIO42 N/A N/A Not Implemented.
GPIO43 N/A N/A Not Implemented.
A GPIO44 N/A N/A Not Implemented. A

GPIO45 N/A N/A Not Implemented.


Wistron Incorporated
GPIO46 N/A N/A Not Implemented.
21F, 88, Sec.1,Hsin Tai W u Rd
GPIO47 N/A N/A Not Implemented. Hsichih, Taipei Hsien

GPIO48 G14 MAIN P_GPIO48 I/O L Multiplexed with STRAP1# Title


GPIO TABLE
GPIO49 AB22 CPU H_PWRGD I/O H Multiplexed with CPUPWRGD
Size Document Number Rev
A3 AIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 5 of 31


5 4 3 2 1
A B C D E

PINEVIEW
CK_H_MCH_DP 3D3V_S0 3D3V_S0_CLKIO 3D3V_S0 3D3V_S0_CK505
7 CK_H_MCH_DP CK_H_MCH_DN R268 3D3V_S0_CK505 3D3V_S0_CLKPLL 3D3V_S0_CK505 3D3V_S0_CLKUSB R265
7 CK_H_MCH_DN 0R0603-PAD R568 R264 0R0603-PAD
9 CK_H_CPU_DP CK_H_CPU_DP 1 2 0R0603-PAD 0R0603-PAD 1 2
9 CK_H_CPU_DN CK_H_CPU_DN 1 2 1 2

1
C381 C376 C383 C382 C139 C380

1
C378 C379 C130 C133 C384 C377 C132

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2

SC4D7U10V5ZY-3GP

SC1U10V3ZY-6GP
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2

2
CK_PE_100M_MCH_DP
7 CK_PE_100M_MCH_DP CK_PE_100M_MCH_DN
7 CK_PE_100M_MCH_DN

4 4

CK_96M_DREF_DP
7 CK_96M_DREF_DP CK_96M_DREF_DN
7 CK_96M_DREF_DN
CK_DPL_REFSSCLKIN_DP 3D3V_S0_CLKPLL
7 CK_DPL_REFSSCLKIN_DP CK_DPL_REFSSCLKIN_DN 3D3V_S0_CK505
7 CK_DPL_REFSSCLKIN_DN 3D3V_S0_CLKIO
20100115 3D3V_S0_CLKUSB
2009/11/09

Tigerpoint

16

46
62
23

19
27
43
52
33
56
4

9
CK_ICHSATA_DP C373 U25
16 CK_ICHSATA_DP CK_ICHSATA_DN 1 2

VDD_48

VDD_PLL3
VDD_SRC
VDD_CPU
VDD_PCI
VDD_REF

VDD_IO
VDD_PLL3_IO
VDD_SRC_IO
VDD_SRC_IO
VDD_SRC_IO
VDD_CPU_IO
16 CK_ICHSATA_DN
CK_PE_100M_ICH_DP
15 CK_PE_100M_ICH_DP
15 CK_PE_100M_ICH_DN
CK_PE_100M_ICH_DN Clock Generator Strapping SC27P50V2JN-2-GP
CPU-0
61 CK_H_CPU_DP

1
60 CK_H_CPU_DN
CPU-0#

1
CK_P_33M_ICH 3D3V_S0_CK505 (R)
15 CK_P_33M_ICH
PCI-2/ X5 R557 CLK_XTAL_IN 3
XIN CPU-1
58 CK_H_MCH_DP
CK_14M_ICH TME PIN3,4,5,6,7 X-14D31818M-23GP 1MR3J-L-GP CLK_XTAL_OUT 2 57 CK_H_MCH_DN
17 CK_14M_ICH XOUT CPU-1#

1
(23.30001.331)

2
CK_48M_USB_ICH R552 54 CK_PE_100M_ICH_DP
15 CK_48M_USB_ICH SRC-8/CPU_ITP
10KR2J-3-GP 0 Normal Operation C374
SRC-8#/CPU_ITP#
53 CK_PE_100M_ICH_DN
17,31 ICH_VRMPWRGD_PU ICH_VRMPWRGD_PU 1 2 FSA 17
FSLA/USB48 2009/11/25
1 No Overclocking
2

51 CLK_PCIE_LAN_DP
PCI2_TME SC27P50V2JN-2-GP SRC-7/CR#_F CLK_PCIE_LAN_DN
50
SRC-7#/CR#_E
45
PCI_STOP#/SRC-5 CLK_PCIE_MINI1_DP
44 48
CPU_STOP#/SRC-5# SRC-6
1

SIO 23 CK_33M_SIO
CK_33M_SIO
R553 SRC-6#
47 CLK_PCIE_MINI1_DN
R569 (R)
CK_48M_SIO 10KR2J-3-GP 41 CK_DPL_REF_DP 1 2 0R2J-2-GP CK_DPL_REFSSCLKIN_DP
23 CK_48M_SIO (R) SMB_CLK_MAIN SRC-10 CK_DPL_REF_DN 1 CK_DPL_REFSSCLKIN_DN
7 42 2 0R2J-2-GP
SMB_DATA_MAIN SCLK SRC-10# R570 (R)
R565 6
2

SDATA CK_PE_100M_MCH_DP
3 40 3
ICH_VRMPWRGD_PU CK_PWRGD_R CR#_H/SRC-11 CK_PE_100M_MCH_DN
1 2 63 39
CK_PWRGD/PD# CR#_G/SRC-11#
SCALAR 13 CK_14M_SCALAR
CK_14M_SCALAR 0R0402-PAD-1-GP
37 CLK_PCIE_GPU_DP
3D3V_S0_CK505 2010/04/02 SRC-9 CLK_PCIE_GPU_DN
38
R542 1 SRC-9#
CLK_33_DBP 2 33R2J-2-GP PCI0 8
CR#_A/PCI-0
SRC-5EN/ 10
CR#_B/PCI-1 SRC-4
34 CLK_PCIE_CR_DP
1

PIN29,30 2009/11/25
LAN CLK_PCIE_LAN_DP R547
PCI-3 PCI2_TME
SRC-5_EN/PCI-3
11
12
TME/PCI-2 SRC-4#
35 CLK_PCIE_CR_DN
20 CLK_PCIE_LAN_DP SRC-5_EN/PCI-3
CLK_PCIE_LAN_DN 10KR2J-3-GP CK_33M_SIO R545 1 2 33R2J-2-GP 27_SEL 13 31
20 CLK_PCIE_LAN_DN 27M_SEL/PCI-4 CR#_C/SRC-3
0 PCI STOP#/CPU_STOP# CK_P_33M_ICH R543 1 2 33R2J-2-GP ITP_EN 14 32
ITP_EN/PCIF-5 CR#_D/SRC-3#
2

1 SRC5
DebugPort SRC-5_EN/PCI-3
SRC-2/SATA
28
29
CK_ICHSATA_DP
CK_ICHSATA_DN
CLK_33_DBP FSB SRC-2#/SATA#
64
22 CLK_33_DBP FSLB/TEST_MODE
1

FSC 5
FSLC/TEST_SEL/REF

1
1
R551 EC6 EC5 EC4 24 CK_GPU_27M_R R333 1 2 22R2J-2-GP CK_GPU_27M
10KR2J-3-GP (R) (R) (R) TP47 TPAD28 CLKRESET- SRC-1/SE1
55 25
RESET# SRC-1#/SE2 2009/11/17
XDP-SSA (R) (G)

2
2

GND_PLL3
SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
2009/12/28

GND_SRC
GND_SRC
GND_SRC
GND_CPU
CK_96M_DREF_DP

GND_REF
20

GND_PCI
2

SRC-0/DOT96

GND_48

GND_IO
21 CK_96M_DREF_DN
SRC-0#/DOT96#

GND
3D3V_S0_CK505 RTM875N-606-VD-GRT-GP

18
15
1

22
30
36
49
59
26

65
SMBUS
1

SMB_DATA_MAIN R544
11,13,17,24 SMB_DATA_MAIN
SMB_CLK_MAIN 10KR2J-3-GP
11,13,17,24 SMB_CLK_MAIN
(R) ITP_EN PIN38,39
2009/12/28
2

0 SRC8
ITP_EN 3D3V_S5 3D3V_S5
1 CPU_ITP R422 R394
V_1P05_CORE V_1P05_CORE V_1P05_CORE
MINI CARD BSEL0_4 1 2 FSA 1 2 FSC

BSEL2_4
1
1

1
2 2
24 CLK_PCIE_MINI1_DP CLK_PCIE_MINI1_DP R554 1KR2J-1-GP 1KR2J-1-GP
1

1
1
CLK_PCIE_MINI1_DN 10KR2J-3-GP R589 R564 R556 R587 R395
24 CLK_PCIE_MINI1_DN
1KR2J-1-GP 1KR2J-1-GP
470R2J-2-GP

470R2J-2-GP
470R2J-2-GP

3
2
2

2
BSEL0_3 1 Q49 BSEL2_3 1 Q51
MMBT3904-7-F-GP MMBT3904-7-F-GP
R385 R408
2

2
2

3
R627 (84.03904.L06) (84.03904.L06)

2
2
BSEL1 1 2 FSB BSEL0 1 2BSEL0_2 1 Q26 BSEL2 1 2BSEL2_2 1 Q50
3D3V_S0_CK505 MMBT3904-7-F-GP MMBT3904-7-F-GP
1KR2J-1-GP 4K7R2J-2-GP (84.03904.L06) 4K7R2J-2-GP (84.03904.L06)

2
1

CARD READER JMB385C R546


CLK_PCIE_CR_DP 10KR2J-3-GP
25 CLK_PCIE_CR_DP
CLK_PCIE_CR_DN (G) 2009/11/21
25 CLK_PCIE_CR_DN
2

27_SEL
3D3V_S0_CLKIO
1

CPU, MCH and XDP BCLK


GPU GT218 R555 (S)
10KR2J-3-GP FREQUENCY SELECTION TABLE
1

1
14 CLK_PCIE_GPU_DP CLK_PCIE_GPU_DP
14 CLK_PCIE_GPU_DN CLK_PCIE_GPU_DN R563 R540 FSC FSB FSA Host Clock
2

47KR2J-2-GP 47KR2J-2-GP BSEL2 BSEL1 BSEL0 frequency MHz


(R)
14 CK_GPU_27M CK_GPU_27M
2

2
1 0 1 100
27_SEL PIN 20 PIN 21 PIN 24 PIN 25 CK_48M_USB_ICH R332 1 2 22R2J-2-GP FSA
0 0 1 133
0 DOT96 DOT96# SRC1 SRC1#
Frequency select 1 SRC0 SRC0 27M_NSS 27M_SS 0 1 1 166
CK_14M_ICH R354
0 1 0 200
9 BSEL0 1 2 22R2J-2-GP FSC
R560
33KR2J-3-GP
R541
33KR2J-3-GP
0 0 0 266
9 BSEL1
1
1

1 (R) 1 0 0 333 1
1

EC8 EC7
9 BSEL2
(R) (R) 1 1 0 400
2

2
SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

1 1 1 Reserved
2
2

Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
CK_48M_SIO R359 1 2 22R2J-2-GP
Title

CK_14M_SCALAR R360 (S)


CLOCK GENERATOR
1 2 22R2J-2-GP
Size Document Number Rev
C AIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 6 of 31


A B C D E
5 4 3 2 1

TPT
DMI_MCH_IT_MR_0_DP
15 DMI_MCH_IT_MR_0_DP U4F 6 OF 6
DMI_MCH_IT_MR_0_DN
15 DMI_MCH_IT_MR_0_DN
A11 F24
DMI_MCH_IT_MR_1_DP VSS VSS
A16 F28
15 DMI_MCH_IT_MR_1_DP VSS VSS
A19 F4
DMI_MCH_IT_MR_1_DN VSS VSS
A29 G15
15 DMI_MCH_IT_MR_1_DN RSVD_NCTF#A29 VSS
A3 G17
DMI_MCH_IT_MR_2_DP 1 OF 6 RSVD_NCTF#A3 VSS
U4A A30 G22
15 DMI_MCH_IT_MR_2_DP RSVD_NCTF#A30 VSS
A4 G27
DMI_MCH_IT_MR_2_DN RSVD_NCTF#A4 VSS
AA13 G31
15 DMI_MCH_IT_MR_2_DN DMI_MCH_IT_MR_0_DP DMI_MCH_MT_IR_0_DP VSS VSS
F3 G2 AA14 H11
DMI_MCH_IT_MR_3_DP DMI_MCH_IT_MR_0_DN DMI_RXP_0 DMI_TXP_0 DMI_MCH_MT_IR_0_DN VSS VSS
F2 G1 AA16 H15
15 DMI_MCH_IT_MR_3_DP DMI_MCH_IT_MR_1_DP DMI_RXN_0 DMI_TXN_0 DMI_MCH_MT_IR_1_DP VSS VSS
H4 H3 AA18 H2
DMI_RXP_1 DMI_TXP_1 VSS VSS
15 DMI_MCH_IT_MR_3_DN
DMI_MCH_IT_MR_3_DN DMI_MCH_IT_MR_1_DN G3
DMI_RXN_1 DMI_TXN_1
J2 DMI_MCH_MT_IR_1_DN SIGNAL NAMING CONVENTION AA2
VSS VSS
H21
DMI_MCH_IT_MR_2_DP K2 K3 DMI_MCH_MT_IR_2_DP DMI: DIRECT MEDIA INTERFACE AA22 H25
D
DMI_MCH_IT_MR_2_DN DMI_RXP_2 DMI_TXP_2 DMI_MCH_MT_IR_2_DN VSS VSS D
J1 L2 EXP: PCI EXPRESS AA25 H8
DMI_MCH_MT_IR_0_DP DMI_MCH_IT_MR_3_DP DMI_RXN_2 DMI_TXN_2 DMI_MCH_MT_IR_3_DP VSS VSS
15 DMI_MCH_MT_IR_0_DP M4 M2 AA26 J11
DMI_MCH_IT_MR_3_DN DMI_RXP_3 DMI_TXP_3 DMI_MCH_MT_IR_3_DN IRP: ICH RECEIVE POSITIVE VSS VSS
L3 N2 AA29 J13
DMI_MCH_MT_IR_0_DN DMI_RXN_3 DMI_TXN_3 IRN: ICH RECEIVE NEGATIVE VSS VSS
15 DMI_MCH_MT_IR_0_DN AA8 J15
CK_PE_100M_MCH_DN GIRCOMP VSS VSS
N7
EXP_CLKINN EXP_RCOMPO
L10 MTP: MCH TRANSMIT POSITIVE AB19
VSS VSS
J4
DMI_MCH_MT_IR_1_DP CK_PE_100M_MCH_DP N6 L9 AB21 K11
15 DMI_MCH_MT_IR_1_DP EXP_CLKINP EXP_ICOMPI MRP: MCH RECEIVE POSITIVE VSS VSS

1
L8 GRBIAS AB28 K13
EXP_RBIAS MRN: MCH RECEIVE NEGATIVE VSS VSS

1
15 DMI_MCH_MT_IR_1_DN DMI_MCH_MT_IR_1_DN R10 R464 AB29 K19
RSVD#R10 TP_CPU_N11 R467 49D9R2F-GP MTN: MCH TRANSMIT NEGATIVE VSS VSS
R9 N11 AB30 K26
DMI_MCH_MT_IR_2_DP RSVD#R9 RSVD_TP#N11 TP_CPU_P11 TP35 TPAD28 750R3F-GP VSS VSS
15 DMI_MCH_MT_IR_2_DP N10
RSVD#N10 RSVD_TP#P11
P11
TP34 TPAD28
ITP: ICH TRANSMIT POSITIVE AC10
VSS VSS
K27
N9 ITN: ICH TRANSMIT NEGATIVE AC11 K28

2
DMI_MCH_MT_IR_2_DN RSVD#N9 VSS VSS
15 DMI_MCH_MT_IR_2_DN AC19 K30

2
VSS VSS
AC2 K4
VSS VSS
15 DMI_MCH_MT_IR_3_DP DMI_MCH_MT_IR_3_DP PINEVIEW-1-GP FROM V0.7/ P15 AC21
VSS VSS
K8
(71.0ATOM.AHU)
NOTE: PCIE AC28
VSS VSS
L1
DMI_MCH_MT_IR_3_DN AC30 L13
15 DMI_MCH_MT_IR_3_DN COMP SIGNAL AD26
VSS VSS
L18
TERMINATION VSS VSS
AD5 L22
VSS VSS
AE1 L24
VSS VSS
AE11 L25
VSS VSS
AE13 L29
VSS VSS
AE15 M28
VSS VSS
AE17 M3
VSS VSS
AE22 N1
PM_DPRSLPVR VSS VSS
AE31 N13
17 PM_DPRSLPVR VSS VSS
AF11 N18
VSS VSS
AF17 N24
VSS VSS
Hsync & Vsync level shift 3D3V_S0
AF21
AF24
VSS VSS
N25
N28
VSS VSS
AF28 N4
VSS VSS
AG10 N5
VSS VSS
AG3 N8
VSS VSS

1
AH18 P13
VSS VSS
SIO PLACE 10 OHM CLOSE R56 R62 AH23
VSS VSS
P14
TO CPU <750 MILS 1KR2J-1-GP 1KR2J-1-GP AH28 P16
PWRGD_3V (R) (R) VSS VSS
17 PWRGD_3V AH4 P18
3 OF 6 VSS VSS
U4C
DY DY AH6 P19

2
PLTRST_N R55 VSS VSS
C
14,17,22,23 PLTRST_N AH8 P21 C
10R2F-L-GP VSS VSS
D12 AJ1 P3
XDP_RSVD_0 HSYNC_L HSYNC RSVD_NCTF#AJ1 VSS
A7 M30 1 2 AJ16 P4
XDP_RSVD_1 CRT_HSYNC VSYNC_L VSYNC VSS VSS
D6 M29 1 2 AJ31 R25
XDP_RSVD_2 CRT_VSYNC R61 VSS VSS
C5 AK1 R7
XDP_RSVD_3 RSVD_NCTF#AK1 VSS
CLOCK C7
C6
XDP_RSVD_4
N31 VGA_RED
10R2F-L-GP AK2
AK23
RSVD_NCTF#AK2 VSS
R8
T11
CK_PE_100M_MCH_DP XDP_RSVD_5 CRT_RED VGA_GREEN VSS VSS
6 CK_PE_100M_MCH_DP D8 P30 AK30 U22
XDP_RSVD_6 CRT_GREEN VGA_BLUE RSVD_NCTF#AK30 VSS
B7 P29 AK31 U23
CK_PE_100M_MCH_DN XDP_RSVD_7 CRT_BLUE RSVD_NCTF#AK31 VSS
6 CK_PE_100M_MCH_DN A9 N30 AL13 U24
XDP_RSVD_8 CRT_IRTN VSS VSS
D9 AL19 U27
XDP_RSVD_9 VSS VSS
6 CK_H_MCH_DN
CK_H_MCH_DN C8
XDP_RSVD_10
FROM V0.7 SCHEMATIC P15 AL2
RSVD_NCTF#AL2 VSS
V14
B8 AL23 V16
XDP_RSVD_11 VSS VSS
6 CK_H_MCH_DP
CK_H_MCH_DP TP4 TPAD28 TP_CPU_C10 C10
XDP_RSVD_12 CRT_DDC_DATA
L31 MCH_DDC_DATA NOTE: COLSE TO CPU <500MILS TO CPU BALL AL29
RSVD_NCTF#AL29 VSS
V18
D10 L30 MCH_DDC_CLK AL3 V28
XDP_RSVD_13 CRT_DDC_CLK RSVD_NCTF#AL3 VSS
B11 AL30 V29
TP3 TPAD28 TP_CPU_B10 XDP_RSVD_14 DACREFSET R88 665R2F-2-GP V_1P05_CORE RSVD_NCTF#AL30 VSS
B10 P28 1 2 AL9 W13
XDP_RSVD_15 DAC_IREF VSS VSS
B12 B13 W2
XDP_RSVD_16 CK_96M_DREF_DP R97 (R) 10KR2J-3-GP VSS VSS
C11 Y30 1 2 B16 W23
XDP_RSVD_17 DPL_REFCLKINP CK_96M_DREF_DN R92 (R) 10KR2J-3-GP VSS VSS
Y29 1 2 B19 W25
DPL_REFCLKINN CK_DPL_REFSSCLKIN_DP R103 10KR2J-3-GP VSS VSS
AA30 1 2 B22 W26
DPL_REFSSCLKINP CK_DPL_REFSSCLKIN_DN R109 10KR2J-3-GP VSS VSS
AA31 1 2 B30 W28
DPL_REFSSCLKINN RSVD_NCTF#B30 VSS
VGA L11
B31
B5
RSVD_NCTF#B31 VSS
W30
W4
HSYNC RSVD#L11 VSS VSS
B9 W5
13 HSYNC 2010/01/17 R969 1 (R) VSS VSS
2 0R2J-2-GP PM_DPRSLPVR C1 W6
VSYNC RSVD_NCTF#C1 VSS
C12 W7
13 VSYNC PM_DPRSLPVR_R R53 VSS VSS
K29 1 2 0R0402-PAD-1-GP PM_EXTTS1_N C21 Y28
VGA_RED PM_EXTTS#_0 RSVD#K29 PM_EXTTS0_N VSS VSS
J30 C22 Y3
13 VGA_RED RSVD#J30 PWRGD_3V VSS VSS
L5 C25 Y4
VGA_GREEN PWROK PLTRST_N VSS VSS
AA3 C31
13 VGA_GREEN RSTIN# RSVD_NCTF#C31
D22
VGA_BLUE 2010/05/05 VSS
E1
13 VGA_BLUE CK_H_MCH_DN RSVD_NCTF#E1
W8 E10
MCH_DDC_DATA HPL_CLKINN CK_H_MCH_DP VSS
13 MCH_DDC_DATA W9 E19
HPL_CLKINP VSS
E21
MCH_DDC_CLK TP43 TPAD28 TP_CPU_AA7 VSS
13 MCH_DDC_CLK AA7 E25 T29
TP40 TPAD28 TP_CPU_AA6 RSVD_TP#AA7 VSS VSS
AA6 E8
B
TP32 TPAD28 TP_CPU_R5 RSVD_TP#AA6 VSS B
R5 F17
CK_96M_DREF_DP TP33 TPAD28 TP_CPU_R6 RSVD_TP#R5 10KR2J-3-GP 3D3V_S0 VSS
6 CK_96M_DREF_DP R6 F19
RSVD_TP#R6 VSS
CK_96M_DREF_DN TP39 TPAD28 TP_CPU_AA21 AA21 (R) R95
6 CK_96M_DREF_DN RSVD_TP#AA21 PINEVIEW-1-GP
TP38 TPAD28 TP_CPU_W21 W21 PM_EXTTS1_N 1 2
CK_DPL_REFSSCLKIN_DP TP37 TPAD28 TP_CPU_T21 RSVD_TP#W21
6 CK_DPL_REFSSCLKIN_DP T21
RSVD_TP#T21

1
TP36 TPAD28 TP_CPU_V21 V21 (71.0ATOM.AHU)
CK_DPL_REFSSCLKIN_DN RSVD_TP#V21 R968
6 CK_DPL_REFSSCLKIN_DN
0R0402-PAD-1-GP

(R) R98

2
PM_EXTTS0_N 1 2

10KR2J-3-GP 2010/05/05

DIMM
VGA_RED
PM_EXTTS0_N VGA_GREEN
11 PM_EXTTS0_N
VGA_BLUE
PM_EXTTS1_N
11 PM_EXTTS1_N 1

1
R85 R76 R65
150R2J-L1-GP-U 150R2J-L1-GP-U 150R2J-L1-GP-U
(R) (R) (R)

2
2

2
PINEVIEW-1-GP Layout: Please close to Pinview.
(71.0ATOM.AHU)

A A

Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Title
PINEVIEW:DMI&EXP/ VSS/ VGA
Size Document Number Rev
C AIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 7 of 31


5 4 3 2 1
5 4 3 2 1

M_MAA_A[14..0]
DIMM 11 M_MAA_A[14..0]
U4B 2 OF 6
M_SBS_A2 M_MAA_A[14..0]
11 M_SBS_A2
M_SBS_A1 M_MAA_A0 AH19 AD3 M_DQS_A_DP0
11 M_SBS_A1 DDR_A_MA_0 DDR_A_DQS_0
M_SBS_A0 M_MAA_A1 AJ18 AD2 M_DQS_A_DN0
11 M_SBS_A0 DDR_A_MA_1 DDR_A_DQS#_0
M_MAA_A2 AK18 AD4 M_DQM_A0
M_SCS_A_N3 M_MAA_A3 DDR_A_MA_2 DDR_A_DM_0 M_DATA_A[63..0]
11 M_SCS_A_N3 AK16
M_SCS_A_N2 M_MAA_A4 DDR_A_MA_3 M_DATA_A0
11 M_SCS_A_N2 AJ14 AC4
M_SCS_A_N1 M_MAA_A5 DDR_A_MA_4 DDR_A_DQ_0 M_DATA_A1
11 M_SCS_A_N1 AH14 AC1
M_SCS_A_N0 M_MAA_A6 DDR_A_MA_5 DDR_A_DQ_1 M_DATA_A2
11 M_SCS_A_N0 AK14 AF4
M_MAA_A7 DDR_A_MA_6 DDR_A_DQ_2 M_DATA_A3
AJ12 AG2
M_SCKE_A3 M_MAA_A8 DDR_A_MA_7 DDR_A_DQ_3 M_DATA_A4
11 M_SCKE_A3 AH13 AB2
M_SCKE_A2 M_MAA_A9 DDR_A_MA_8 DDR_A_DQ_4 M_DATA_A5
11 M_SCKE_A2 AK12 AB3
M_SCKE_A1 M_MAA_A10 DDR_A_MA_9 DDR_A_DQ_5 M_DATA_A6
11 M_SCKE_A1 AK20 AE2
M_SCKE_A0 M_MAA_A11 DDR_A_MA_10 DDR_A_DQ_6 M_DATA_A7
11 M_SCKE_A0 AH12 AE3
M_MAA_A12 DDR_A_MA_11 DDR_A_DQ_7
AJ11
D
M_ODT_A3 M_MAA_A13 DDR_A_MA_12 M_DQS_A_DP1 D
11 M_ODT_A3 AJ24 AB8
M_ODT_A2 M_MAA_A14 DDR_A_MA_13 DDR_A_DQS_1 M_DQS_A_DN1
11 M_ODT_A2 AJ10 AD7
M_ODT_A1 DDR_A_MA_14 DDR_A_DQS#_1 M_DQM_A1
11 M_ODT_A1 AA9
M_ODT_A0 DDR_A_DM_1
11 M_ODT_A0
M_WE_A_N AK22 AB6 M_DATA_A8
M_CAS_A_N DDR_A_WE# DDR_A_DQ_8 M_DATA_A9
AJ22 AB7
M_DATA_A[63..0] M_RAS_A_N DDR_A_CAS# DDR_A_DQ_9 M_DATA_A10
11 M_DATA_A[63..0] AK21 AE5
DDR_A_RAS# DDR_A_DQ_10 M_DATA_A11
AG5
M_SBS_A0 DDR_A_DQ_11 M_DATA_A12
AJ20 AA5
M_WE_A_N M_SBS_A1 DDR_A_BS_0 DDR_A_DQ_12 M_DATA_A13
AH20 AB5
11 M_WE_A_N M_CAS_A_N M_SBS_A2 DDR_A_BS_1 DDR_A_DQ_13 M_DATA_A14
AK11 AB9
11 M_CAS_A_N M_RAS_A_N DDR_A_BS_2 DDR_A_DQ_14 M_DATA_A15
AD6
11 M_RAS_A_N DDR_A_DQ_15

11 CK_M_DDR0_A_DP CK_M_DDR0_A_DP AD8 M_DQS_A_DP2


CK_M_DDR0_A_DN M_SCS_A_N0 DDR_A_DQS_2 M_DQS_A_DN2
11 CK_M_DDR0_A_DN AH22 AD10
CK_M_DDR1_A_DP M_SCS_A_N1 DDR_A_CS#_0 DDR_A_DQS#_2 M_DQM_A2
11 CK_M_DDR1_A_DP AK25 AE8
CK_M_DDR1_A_DN M_SCS_A_N2 DDR_A_CS#_1 DDR_A_DM_2
11 CK_M_DDR1_A_DN AJ21
M_SCS_A_N3 DDR_A_CS#_2 M_DATA_A16
AJ25 AG8
DDR_A_CS#_3 DDR_A_DQ_16 M_DATA_A17
AG7
CK_M_DDR3_A_DP M_SCKE_A0 DDR_A_DQ_17 M_DATA_A18
11 CK_M_DDR3_A_DP AH10 AF10
CK_M_DDR3_A_DN M_SCKE_A1 DDR_A_CKE_0 DDR_A_DQ_18 M_DATA_A19
11 CK_M_DDR3_A_DN AH9 AG11
CK_M_DDR4_A_DP M_SCKE_A2 DDR_A_CKE_1 DDR_A_DQ_19 M_DATA_A20
11 CK_M_DDR4_A_DP AK10 AF7
CK_M_DDR4_A_DN M_SCKE_A3 DDR_A_CKE_2 DDR_A_DQ_20 M_DATA_A21
11 CK_M_DDR4_A_DN AJ8 AF8
DDR_A_CKE_3 DDR_A_DQ_21 M_DATA_A22
AD11
M_ODT_A0 DDR_A_DQ_22 M_DATA_A23
AK24 AE10
M_ODT_A1 DDR_A_ODT_0 DDR_A_DQ_23
AH26
M_ODT_A2 DDR_A_ODT_1 M_DQS_A_DP3
AH24 AK5
M_ODT_A3 DDR_A_ODT_2 DDR_A_DQS_3 M_DQS_A_DN3
AK27 AK3
DDR_A_ODT_3 DDR_A_DQS#_3 M_DQM_A3
AJ3
DDR_A_DM_3
M_DQS_A_DP0 AH1 M_DATA_A24
11 M_DQS_A_DP0 DDR_A_DQ_24
M_DQS_A_DP1 CK_M_DDR0_A_DP AG15 AJ2 M_DATA_A25
11 M_DQS_A_DP1 DDR_A_CK_0 DDR_A_DQ_25
M_DQS_A_DP2 CK_M_DDR0_A_DN AF15 AK6 M_DATA_A26
11 M_DQS_A_DP2 DDR_A_CK#_0 DDR_A_DQ_26
M_DQS_A_DP3 CK_M_DDR1_A_DP AD13 AJ7 M_DATA_A27
11 M_DQS_A_DP3 DDR_A_CK_1 DDR_A_DQ_27
M_DQS_A_DP4 CK_M_DDR1_A_DN AC13 AF3 M_DATA_A28
11 M_DQS_A_DP4 DDR_A_CK#_1 DDR_A_DQ_28
M_DQS_A_DP5 AD17 AH2 M_DATA_A29
11 M_DQS_A_DP5 DDR_A_CK_2 DDR_A_DQ_29
M_DQS_A_DP6 AC17 AL5 M_DATA_A30
11 M_DQS_A_DP6 DDR_A_CK#_2 DDR_A_DQ_30
C M_DQS_A_DP7 CK_M_DDR3_A_DP AC15 AJ6 M_DATA_A31 C
11 M_DQS_A_DP7 DDR_A_CK_3 DDR_A_DQ_31
CK_M_DDR3_A_DN AD15
CK_M_DDR4_A_DP DDR_A_CK#_3 M_DQS_A_DP4
AF13 AG22
CK_M_DDR4_A_DN DDR_A_CK_4 DDR_A_DQS_4 M_DQS_A_DN4
AG13 AG21
M_DQS_A_DN0 DDR_A_CK#_4 DDR_A_DQS#_4 M_DQM_A4
11 M_DQS_A_DN0 AB15 AD19
M_DQS_A_DN1 DDR_A_CK_5 DDR_A_DM_4
11 M_DQS_A_DN1 AB17
M_DQS_A_DN2 DDR_A_CK#_5 M_DATA_A32
11 M_DQS_A_DN2 AE19
M_DQS_A_DN3 DDR_A_DQ_32 M_DATA_A33
11 M_DQS_A_DN3 AG19
M_DQS_A_DN4 1D5V_S3 DDR_A_DQ_33 M_DATA_A34
11 M_DQS_A_DN4 AF22
M_DQS_A_DN5 DDR_A_DQ_34 M_DATA_A35
11 M_DQS_A_DN5 AD22
M_DQS_A_DN6 DDR_A_DQ_35 M_DATA_A36
11 M_DQS_A_DN6 AG17
DDR_A_DQ_36

2
M_DQS_A_DN7 AF19 M_DATA_A37
11 M_DQS_A_DN7 DDR_A_DQ_37
R166 AE21 M_DATA_A38
DDR_A_DQ_38 M_DATA_A39
10KR2J-3-GP AD21
(R) DDR_A_DQ_39
M_DQM_A0 AE26 M_DQS_A_DP5
11 M_DQM_A0

1
M_DQM_A1 DDR_DRAM_PWROK DDR_A_DQS_5 M_DQS_A_DN5
11 M_DQM_A1 AB4 AG27
M_DQM_A2 DDR_DRAM_RST_N R967 1 0R0402-PAD-1-GP DDR_DRAM_RST_R VSS DDR3_DRAMRST DDR_A_DQS#_5 M_DQM_A5
11 M_DQM_A2 2 AK8 AJ27
M_DQM_A3 2010/01/17 RSVD#AK8 DDR_A_DM_5
11 M_DQM_A3 1D5V_S3 1D5V_S3
M_DQM_A4 AE24 M_DATA_A40
11 M_DQM_A4 DDR_A_DQ_40
M_DQM_A5 AG25 M_DATA_A41
11 M_DQM_A5 DDR_A_DQ_41
M_DQM_A6 R138 TP42 TPAD28 TP_CPU_AB11 AB11 AD25 M_DATA_A42
11 M_DQM_A6 RSVD_TP#AB11 DDR_A_DQ_42
M_DQM_A7 1KR2F-3-GP TP41 TPAD28 TP_CPU_AB13 AB13 AD24 M_DATA_A43
11 M_DQM_A7 RSVD_TP#AB13 DDR_A_DQ_43
AC22 M_DATA_A44
MCH_VREF DDR_A_DQ_44 M_DATA_A45
1 2 AL28 AG24
R140 1 DDR_VREF DDR_A_DQ_45
11 DDR_DRAM_RST_N
DDR_DRAM_RST_N 2 80D6R2F-L-GP MCH_DDR_RPD AK28 AD27 M_DATA_A46
R141 2 MCH_DDR_RPU DDR_RPD DDR_A_DQ_46 M_DATA_A47
1 80D6R2F-L-GP AJ26 AE27
DDR_RPU DDR_A_DQ_47
1

AK29 AE30 M_DQS_A_DP6


RSVD#AK29 DDR_A_DQS_6
1

C291 AF29 M_DQS_A_DN6


R136 C76 SCD01U16V2KX-3GP DDR_A_DQS#_6 M_DQM_A6
AF30
1KR2F-3-GP SCD1U16V2ZY-2GP DDR_A_DM_6
2

CAD NOTE: PLACE C AG31 M_DATA_A48


2

DDR_A_DQ_48
CAD NOTE: PLACE R CLOSE TO RPU DDR_A_DQ_49
AG30 M_DATA_A49
CLOSE TO PINS ON AD30 M_DATA_A50
DDR_A_DQ_50 M_DATA_A51
MCH_VREF AD29
DDR_A_DQ_51 M_DATA_A52
AJ30
DDR_A_DQ_52 M_DATA_A53
AJ29
B DDR_A_DQ_53 M_DATA_A54 B
AE29
DDR_A_DQ_54 M_DATA_A55
AD28
DDR_A_DQ_55
AB27 M_DQS_A_DP7
DDR_A_DQS_7 M_DQS_A_DN7
AA27
DDR_A_DQS#_7 M_DQM_A7
AB26
DDR_A_DM_7
AA24 M_DATA_A56
DDR_A_DQ_56 M_DATA_A57
AB25
DDR_A_DQ_57 M_DATA_A58
W24
DDR_A_DQ_58 M_DATA_A59
W22
DDR_A_DQ_59 M_DATA_A60
AB24
DDR_A_DQ_60 M_DATA_A61
AB23
DDR_A_DQ_61 M_DATA_A62
AA23
DDR_A_DQ_62 M_DATA_A63
W27
DDR_A_DQ_63
MISC
SLP_S4_N
17,23,28,29 SLP_S4_N PINEVIEW-1-GP

(71.0ATOM.AHU)
8209A_PGOOD
29 8209A_PGOOD 1D5V_S3

FROM V_0.7 P 10 8209A_PGOOD

2
R162 1 2 10KR2J-3-GP R157
Base on Power rail 10KR2J-3-GP
(R)
layout

1
5V_S5
DDR_DRAM_PWROK

A A

1
R167 1 2 1KR2J-1-GP DRAM_PWROK_BJT

1
C90 R158
SC1U10V3ZY-6GP 0R2J-2-GP
(R)

2
3

SLP_S4_N R160 1 2 1KR2J-1-GP SLP_S4_N_BJT 5 2 Wistron Incorporated


1

C92
21F, 88, Sec.1,Hsin Tai Wu Rd
4

Q13 Hsichih, Taipei Hsien


2

MMDT3904-7-F-GP (R)
SC1U10V3ZY-6GP Title
PINEVIEW: DDR2
Size Document Number Rev
C AIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 8 of 31


5 4 3 2 1
5 4 3 2 1

CLOCK
CK_H_CPU_DN
6 CK_H_CPU_DN
CK_H_CPU_DP
6 CK_H_CPU_DP

6/22

V_1P05_CORE
D D

(R)
H_PWRGD R469 1 2 1KR2F-3-GP

(R)
PM_DPRSTP_N R431 1 2 1KR2F-3-GP

H_FERR_N R430 1 2 56R2J-4-GP


R370 1 2 1KR2J-1-GP LVD_VBG CAD NOTE: PLACE R NEAR TO
TIGER POINT
R358 2 1KR2J-1-GP LVD_IBG
Frequency select 1

LVD_VREFH_OUT_R H_DPSLP_N
(R)
R416 1 2 1KR2J-1-GP R427 1 2 1KR2F-3-GP
6 BSEL0 R421 LVD_VREFL_OUT_R
1 2 1KR2J-1-GP
U4D 4 OF 6
6 BSEL1 H_SB_THERMTRIP_N R30 1 2 56R2J-4-GP
6 BSEL2
NOTE: MOUNT 1K OHM IF CAD NOTE: PLACE R NEAR TO
NO LVDS U25 E7 H_SMI_N PINEVIEW
LVD_A_CLKM SMI# H_A20M_N
U26 H7
LVD_A_CLKP A20M# H_FERR_N
R23 H6
LVD_A_DATAM_0 FERR#
TPT R24
N26
LVD_A_DATAP_0 LINT00
F10
F11
H_INTR
H_NMI
H_THERMTRIP_N LVD_A_DATAM_1 LINT10 H_IGNNE_N
N27 E5
16 H_THERMTRIP_N LVD_A_DATAP_1 IGNNE# H_STPCLK_N
R26 F8
H_SMI_N LVD_A_DATAM_2 STPCLK#
16 H_SMI_N R27
LVD_A_DATAP_2

16 H_A20M_N H_A20M_N G6 PM_DPRSTP_N


LVD_IBG DPRSTP# H_DPSLP_N
R22 G10
H_FERR_N LVD_VBG LVD_IBG DPSLP# H_SB_INIT_N R426 1 H_INIT_N
J28 G8 2 0R0402-PAD-1-GP
16 H_FERR_N LVD_VREFH_OUT_R LVD_VBG INIT# H_BPM4_PRDY_N
N22 E11
H_INTR LVD_VREFL_OUT_R LVD_VREFH PRDY# H_BPM5_PREQ_N
16 H_INTR N23 F15
LVD_VREFL PREQ#
LBKLT_EN L27
LBKLT_EN
NOTE: PLACE NEAR TO TIGERPOINT
C 16 H_NMI H_NMI RN12 LBKLT_CTL L26 C
LDDC_DATA LCTLA_CLK LBKLT_CTL H_SB_THERMTRIP_N R31 H_THERMTRIP_N
3D3V_S0 1 8 L23 E13 1 2 0R0402-PAD-1-GP
H_IGNNE_N LCTLB_DATA LCTLA_CLK THERMTRIP#
16 H_IGNNE_N 2 7 K25
LDDC_CLK LCTLB_CLK C23
3 6 K23 1 2 SC1U10V3ZY-6GP V_1P05_CORE V_1P05_CORE
H_STPCLK_N LCTLA_CLK LDDC_DATA LDDC_CLK
16 H_STPCLK_N 4 5 K24
LVDD_EN LDDC_DATA
H26
PM_DPRSTP_N LVDD_EN H_PROCHOT_N_R R37
17 PM_DPRSTP_N SRN2K2J-2-GP C18 1 2 1KR2F-3-GP
PROCHOT#
1

1
W1 H_PWRGD
H_DPSLP_N (R) R374 CPUPWRGOOD R17
17 H_DPSLP_N 1KR2F-3-GP
100KR2J-1-GP C281 1 2 SC1U10V3ZY-6GP R28
H_INIT_N (R) 0R0402-PAD
16 H_INIT_N
A13 CPU_GTLREF 1 2CPU_GTLREF_R
2

1 2
GTLREF
H27
VSS

1
C17
C25 SC1U10V3ZY-6GP R24
SIO SC220P50V2KX-3GP 2KR2F-3-GP

2
L6 TP_HFPLL_1 TPAD28 TP31 (R)
CPU_THERMDA RSVD#L6 TP_HFPLL_2 TPAD28 TP29
E17

2
23 CPU_THERMDA H_BPM_N0 RSVD#E17
G11
CPU_THERMDC H_BPM_N1 BPM_1#_0 CK_H_CPU_DN
23 CPU_THERMDC E15 H10
H_BPM_N2 BPM_1#_1 BCLKN CK_H_CPU_DP
G13 J10
H_BPM_N3 BPM_1#_2 BCLKP
F13
BPM_1#_3 BSEL0 DESIGN CAD: PLACE NEAR TO CPU < 1500 MILS
K5
H_BPM_2_N0 BSEL_0 BSEL1
B18 H5
H_BPM_2_N1 BPM_2#_0 BSEL_1 BSEL2
B20 K6
H_BPM_2_N2 BPM_2#_1 BSEL_2 H_VID[6..0]
C20
H_BPM_2_N3 BPM_2#_2 H_VID0
B21 H30
BPM_2#_3 VID_0 H_VID1
H29
VID_1
XDP-SSA VID_2
H28
G30
H_VID2
H_VID3
H_PWRGD XDP_TESTIN_N VID_3 H_VID4
G5 G29
17 H_PWRGD H_TDI RSVD#G5 VID_4 H_VID5
D14 F29
XDP_TESTIN_N H_TDO TDI VID_5 H_VID6
D13 E29
22 XDP_TESTIN_N H_TCK TDO VID_6
B14
H_TDI H_TMS TCK TPEV_H_DCLKPH_1
C14 L7
22 H_TDI H_TRST_N TMS RSVD#L7 TPEV_H_DCLKPH_2
C16 D20
H_TDO TRST# RSVD#D20 TPEV_H_ACLKPH_1
H13
22 H_TDO RSVD#H13 TPEV_H_ACLKPH_2
D18
B
H_TCK CPU_THERMDA RSVD#D18 B
D30
22 H_TCK CPU_THERMDC THRMDA_1 TP_CPU_K9 TPAD28 TP30
E30 K9
THRMDC_1 RSVD_TP#K9

1
1

1
H_TMS TP5 TPAD28 CPU2_THERMDA C30 D19 TP_CPU_D19 TPAD28 TP25
22 H_TMS TP6 TPAD28 CPU2_THERMDC THRMDA_2 RSVD_TP#D19 H_EXT_BGREF_1 R36 R462 R38 R428
D31 K7
H_TRST_N THRMDC_2 EXTBGREF 1KR2F-3-GP 1KR2F-3-GP 1KR2F-3-GP 1KR2F-3-GP
22 H_TRST_N (R) (R) (R) (R)
H_BPM4_PRDY_N V_1P05_CORE
22 H_BPM4_PRDY_N

2
2

2
H_BPM5_PREQ_N
22 H_BPM5_PREQ_N

1
R451
22 H_BPM_N0 H_BPM_N0 976R2F-3-GP
22 H_BPM_N1 H_BPM_N1
H_BPM_N2 PINEVIEW-1-GP
22 H_BPM_N2

2
22 H_BPM_N3 H_BPM_N3
(71.0ATOM.AHU)
22 H_BPM_2_N0 H_BPM_2_N0
22 H_BPM_2_N1 H_BPM_2_N1

1
22 H_BPM_2_N2 H_BPM_2_N2

1
22 H_BPM_2_N3 H_BPM_2_N3 C268 R458
SC1U10V3ZY-6GP 3K32R2F-GP

2
CAD NOTE:GTLREF MAX TRACE
LENGTH OF 500 MIL AND 5 MIL
VCCP VREG CONTROLLER SPACING
H_VID[6..0]
31 H_VID[6..0]

A A

Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Title
PINEVIEW: LVDS/ CPU SB/DEBUG
Size Document Number Rev
C AIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 9 of 31


5 4 3 2 1
5 4 3 2 1

VCCP VERG CONTROLLER


VCC_SENSE_CPU_SKT VCORE
31 VCC_SENSE_CPU_SKT

31 VSS_SENSE_CPU_SKT
VSS_SENSE_CPU_SKT U4E 5 OF 6 NOTE: DECOUPLING FOR PROCESSOR CORE
VOLTAGE 2009/11/30
A23
DESIGN NOTE: VCC
A25
V_1P05_CORE DMI STITCHING CAP VCC
R472 A27
VCC
B23
VCC
MISC 1 2 V_1P05_PCIEXPRESS T13
VCCGFX VCC
B24

1
T14 B25 C15 C20 C19 C14
SLP_S3_N VCCGFX VCC SC1U10V3ZY-6GP SC1U10V3ZY-6GP SC1U10V3ZY-6GP SC1U10V3ZY-6GP C576 C577
17,23,28,29,30 SLP_S3_N T16 B26
0R0805-PAD-1-GP VCCGFX VCC SC10U25V6KX-1GP SC10U25V6KX-1GP
T18 B27

2
VCCGFX VCC

1
C273 C276 C279 C278 C275 C274 C277 T19 C24 (R) (R)
D VCCGFX VCC D
V13 C26
VCCGFX VCC

SC10U6D3V5MX-3GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
V19 D23

2
VCCGFX VCC

SC1U6D3V2KX-GP
W14 D24
DESIGN NOTE: (78.10620.51L) VCCGFX VCC
W16 D26
EDGE CAP FOR VCCGFX VCCGFX VCC
W18 D28
VCCGFX VCC
W19 E22
VCCGFX VCC
E24
VCC
E27
VCC
F21
VCC
F22
VCC
F25
VCC
G19
VCC
VCC
VCC
G21
G24 2009/11/20
VCC
VCC
H17
H19 VCCA_DMI (This circuit is defensive
1D5V_S3 H22
VCC
VCC
H24 design for Pineview A0 only, you don’t
J17
AK13
VCCSM
VCC
VCC
J19 need it for currently B0 state)
AK19 J21
VCCSM VCC
AK9 J22
VCCSM VCC
AL11 K15
VCCSM VCC
AL16 K17
VCCSM VCC
AL21 K21
VCCSM VCC
AL25 L14
VCCSM VCC
L16
VCC
MEMORY DECOUPLING 1D5V_S3
VCC
L19
L21
1D5V_S3 DESIGN NOTE : VCC
N14
EDGE CAP/ DECOUPLING FOR VCC_DDR VCC
N16
VCCCK_DDR VCC
1 2 AK7 N19
L30 VCCCK_DDR VCC
AL7 N21
FCM1608KFG-301T05-GP VCCCK_DDR VCC

1
(R) C296 C295 U10
VCCA_DDR
1

1
1

C294 C290 C293 C292 SC22U6D3V5MX-2GP SCD1U10V2MX-3GP U5

2
VCCA_DDR
C U6 C
VCCA_DDR
SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

U7
2
2

VCCA_DDR
U8
VCCA_DDR
U9
VCCA_DDR
V2
V_1P05_CORE VCCA_DDR
V3
VCCA_DDR
V4
VCCA_DDR
W10
VCCA_DDR
W11
VCCA_DDR VCC_SENSE_CPU_SKT
C29
VCCSENSE VSS_SENSE_CPU_SKT V_1P5_CORE
AA10 B29
V_1P05_CORE VCCACK_DDR VSSSENSE
AA11 Y2
VCCACK_DDR VCCA
V_1P05_CORE
DESIGN NOTE: FOR DEBUG

1
PURPOSES 1 2 VCC_AB_DPL D4 C286
L29 VCC SCD1U10V2MX-3GP
V_1P8_PLLSFR 2010/01/17 HCB1608KF-601T10-GP B4

2
VCCP
2 1 B3
VCCP
L6 1 2 HCB1608KF-601T10-GP C285 (R) AA19 V_1P05_CORE
2009/11/30 SC1U6D3V2KX-GP VCCD_AB_DPL
2009/11/20
R470

1
(R) C60 1 2 SC1U10V3KX-3GP
1 2 VCC_HMPL V11 R466
VCCD_HMPLL Pull- down : Pineview's 2009/11/30 0R0603-PAD-1-GP
C65 LVDS unmount
0R0603-PAD-1-GP 6/22
1 2 SC1U6D3V2KX-GP VCCSFR_AB_DPL AC31 (R)

2
VCCSFR_AB_DPL
V30 VCCALVD_R R87 1 2 0R0402-PAD
VCCALVD
W31 VCCDLVD_R R90 1 2 0R0402-PAD
VCCDLVD

1
V_1P8_PLLSFR (R)
C271 C272
L3 1 2 HCB1608KF-601T10-GP VCCACRTDAC_M T30 SC1U6D3V2KX-GP SC1U6D3V2KX-GP

2
VCCACRTDAC VCCA_DMI (R)
1

BOM NOTE: DEFAULT 3D3V_S0


C47
SC1U6D3V2KX-GP T31 T1 VCCA_DMI
2

VCC_GIO VCCA_DMI
J31 T2
B VCCRING_EAST VCCA_DMI B
C3 T3
VCCRING_WEST VCCA_DMI
B2
VCCRING_WEST L28 V_1P8_PLLSFR
C2 P2
VCCRING_WEST RSVD#P2 VCCAPLL_DMI HCB1608KF-601T10-GP
A21 AA1 2 1
VCC_LGI_VID VCCSFR_DMIHMPLL

1
DESIGN NOTE: DESIGN NOTE: DESIGN NOTE: E2
VCCP V_1P05_CORE
EDGE CAP FOR VCCRING_EAST EDGE CAP VCC_LGI_VID EDGE CAP C287
VCCA_DDR,VCCACK_DDR,VCCD_HMPL,VCCD_AB_DPL DEFENSIVE DESIGN DEFENSIVE DESIGN SC1U6D3V2KX-GP 2010/01/17

2
V_1P05_CORE V_1P05_CORE V_1P05_CORE PINEVIEW-1-GP

(71.0ATOM.AHU)
1
1

C259 C32 C4
DESIGN NOTE:
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP

SC10U6D3V5MX-3GP

SC4D7U10V3KX-GP

EDGE CAP FOR


2
2

1
SC1U6D3V2KX-GP

C282 C284 VCCRING,VCC FUSE


(R) AND VCCPC6
2

V_1P05_CORE

1
1

SC1U6D3V2ZY-GP
SC1U6D3V2ZY-GP
C2 C283
(78.10620.51L)

2
A A

Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Title
PINEVIEW: POWERS
Size Document Number Rev
C AIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 10 of 31


5 4 3 2 1
A B C D E

CLOCK
SMB_DATA_MAIN
6,13,17,24 SMB_DATA_MAIN
DIMM1 DIMM2
SMB_CLK_MAIN M_MAA_A[14..0] M_MAA_A[14..0]
6,13,17,24 SMB_CLK_MAIN
M_MAA_A0 98 NP1 M_MAA_A0 98 NP1
M_MAA_A1 A0 NP1 M_MAA_A1 A0 NP1
97 NP2 97 NP2
A1 NP2 A1 NP2
PNV M_MAA_A[14..0]
M_MAA_A2
M_MAA_A3
96
95
A2
110 M_RAS_A_N
M_MAA_A2
M_MAA_A3
96
95
A2
110 M_RAS_A_N
8 M_MAA_A[14..0] A3 RAS# A3 RAS#
M_MAA_A4 92 113 M_WE_A_N M_MAA_A4 92 113 M_WE_A_N
M_DATA_A[63..0] M_MAA_A5 A4 WE# M_CAS_A_N M_MAA_A5 A4 WE# M_CAS_A_N
8 M_DATA_A[63..0] 91 115 91 115
M_MAA_A6 A5 CAS# M_MAA_A6 A5 CAS#
90 90
M_SBS_A2 M_MAA_A7 A6 M_SCS_A_N0 M_MAA_A7 A6 M_SCS_A_N2
8 M_SBS_A2 86 114 86 114
M_SBS_A1 M_MAA_A8 A7 CS0# M_SCS_A_N1 M_MAA_A8 A7 CS0# M_SCS_A_N3
8 M_SBS_A1 89 121 89 121
M_SBS_A0 M_MAA_A9 A8 CS1# M_MAA_A9 A8 CS1#
8 M_SBS_A0 85 85
M_MAA_A10 A9 M_SCKE_A0 M_MAA_A10 A9 M_SCKE_A2
107 73 107 73
M_SCS_A_N3 M_MAA_A11 A10/AP CKE0 M_SCKE_A1 M_MAA_A11 A10/AP CKE0 M_SCKE_A3
8 M_SCS_A_N3 84 74 84 74
4
M_SCS_A_N2 M_MAA_A12 A11 CKE1 M_MAA_A12 A11 CKE1 4
8 M_SCS_A_N2 83 83
M_SCS_A_N1 M_MAA_A13 A12 CK_M_DDR0_A_DP M_MAA_A13 A12 CK_M_DDR3_A_DP
8 M_SCS_A_N1 119 101 119 101
M_SCS_A_N0 M_MAA_A14 A13 CK0 CK_M_DDR0_A_DN M_MAA_A14 A13 CK0 CK_M_DDR3_A_DN
8 M_SCS_A_N0 80 103 80 103
A14 CK0# A14 CK0#
78 78
M_SCKE_A3 M_SBS_A2 A15 CK_M_DDR1_A_DP M_SBS_A2 A15 CK_M_DDR4_A_DP
8 M_SCKE_A3 79 102 79 102
M_SCKE_A2 A16/BA2 CK1 CK_M_DDR1_A_DN A16/BA2 CK1 CK_M_DDR4_A_DN
8 M_SCKE_A2 104 104
M_SCKE_A1 M_SBS_A0 CK1# M_SBS_A0 CK1#
8 M_SCKE_A1 109 109
M_SCKE_A0 M_SBS_A1 BA0 M_DQM_A0 M_SBS_A1 BA0 M_DQM_A0
8 M_SCKE_A0 108 11 108 11
M_DATA_A[63..0] BA1 DM0 M_DQM_A1 M_DATA_A[63..0] BA1 DM0 M_DQM_A1
28 28
M_ODT_A3 M_DATA_A0 DM1 M_DQM_A2 M_DATA_A0 DM1 M_DQM_A2
8 M_ODT_A3 5 46 5 46
M_ODT_A2 M_DATA_A1 DQ0 DM2 M_DQM_A3 M_DATA_A1 DQ0 DM2 M_DQM_A3
8 M_ODT_A2 7 63 7 63
M_ODT_A1 M_DATA_A2 DQ1 DM3 M_DQM_A4 M_DATA_A2 DQ1 DM3 M_DQM_A4
8 M_ODT_A1 15 136 15 136
M_ODT_A0 M_DATA_A3 DQ2 DM4 M_DQM_A5 M_DATA_A3 DQ2 DM4 M_DQM_A5
8 M_ODT_A0 17 153 17 153
M_DATA_A4 DQ3 DM5 M_DQM_A6 M_DATA_A4 DQ3 DM5 M_DQM_A6
4 170 4 170
M_RAS_A_N M_DATA_A5 DQ4 DM6 M_DQM_A7 M_DATA_A5 DQ4 DM6 M_DQM_A7
8 M_RAS_A_N 6 187 6 187
M_WE_A_N M_DATA_A6 DQ5 DM7 M_DATA_A6 DQ5 DM7
8 M_WE_A_N 16 16
M_CAS_A_N M_DATA_A7 DQ6 SMB_DATA_MAIN M_DATA_A7 DQ6 SMB_DATA_MAIN
8 M_CAS_A_N 18 200 18 200
M_DATA_A8 DQ7 SDA SMB_CLK_MAIN M_DATA_A8 DQ7 SDA SMB_CLK_MAIN
21 202 21 202
CK_M_DDR0_A_DP M_DATA_A9 DQ8 SCL M_DATA_A9 DQ8 SCL
8 CK_M_DDR0_A_DP 23 23
CK_M_DDR0_A_DN M_DATA_A10 DQ9 PM_EXTTS0_N M_DATA_A10 DQ9 PM_EXTTS1_N
8 CK_M_DDR0_A_DN 33 198 33 198
M_DATA_A11 DQ10 EVENT# M_DATA_A11 DQ10 EVENT#
35 35
CK_M_DDR1_A_DP M_DATA_A12 DQ11 M_DATA_A12 DQ11
8 CK_M_DDR1_A_DP 22 199 22 199 3D3V_S0
CK_M_DDR1_A_DN M_DATA_A13 DQ12 VDDSPD M_DATA_A13 DQ12 VDDSPD
8 CK_M_DDR1_A_DN 24 3D3V_S0 24
DQ13 DQ13

1
M_DATA_A14 34 197 C346 (R) M_DATA_A14 34 197 C365 (R)
M_DATA_A15 DQ14 SA0 SCD1U16V2ZY-2GP M_DATA_A15 DQ14 SA0 SCD1U16V2ZY-2GP
36 201 36 201
M_DATA_A16 DQ15 SA1 M_DATA_A16 DQ15 SA1
39 39

2
M_DATA_A17 DQ16 M_DATA_A17 DQ16
41 77 41 77
CK_M_DDR3_A_DP M_DATA_A18 DQ17 NC#1 M_DATA_A18 DQ17 NC#1
8 CK_M_DDR3_A_DP 51 122 51 122
CK_M_DDR3_A_DN M_DATA_A19 DQ18 NC#2 1D5V_S3 M_DATA_A19 DQ18 NC#2
8 CK_M_DDR3_A_DN 53 125 53 125
M_DATA_A20 DQ19 NC#/TEST M_DATA_A20 DQ19 NC#/TEST 1D5V_S3
40 40
CK_M_DDR4_A_DP M_DATA_A21 DQ20 M_DATA_A21 DQ20
8 CK_M_DDR4_A_DP 42 75 42 75

Reverse TYPE 5.2mm


CK_M_DDR4_A_DN M_DATA_A22 DQ21 VDD1 M_DATA_A22 DQ21 VDD1
8 CK_M_DDR4_A_DN 50 76 50 76
M_DATA_A23 DQ22 VDD2 M_DATA_A23 DQ22 VDD2
52 81 52 81

Reverse TYPE 9.2mm


M_DATA_A24 DQ23 VDD3 M_DATA_A24 DQ23 VDD3
57 82 57 82
M_DATA_A25 DQ24 VDD4 M_DATA_A25 DQ24 VDD4
59 87 59 87
M_DATA_A26 DQ25 VDD5 M_DATA_A26 DQ25 VDD5
67 88 67 88
M_DATA_A27 DQ26 VDD6 M_DATA_A27 DQ26 VDD6
69 93 69 93
M_DATA_A28 DQ27 VDD7 M_DATA_A28 DQ27 VDD7
3 56 94 56 94 3
M_DATA_A29 DQ28 VDD8 M_DATA_A29 DQ28 VDD8
58 99 58 99
M_DQS_A_DP0 M_DATA_A30 DQ29 VDD9 M_DATA_A30 DQ29 VDD9
8 M_DQS_A_DP0 68 100 68 100
M_DQS_A_DP1 M_DATA_A31 DQ30 VDD10 M_DATA_A31 DQ30 VDD10
8 M_DQS_A_DP1 70 105 70 105
M_DQS_A_DP2 M_DATA_A32 DQ31 VDD11 M_DATA_A32 DQ31 VDD11
8 M_DQS_A_DP2 129 106 129 106
M_DQS_A_DP3 M_DATA_A33 DQ32 VDD12 M_DATA_A33 DQ32 VDD12
8 M_DQS_A_DP3 131 111 131 111
M_DQS_A_DP4 M_DATA_A34 DQ33 VDD13 M_DATA_A34 DQ33 VDD13
8 M_DQS_A_DP4 141 112 141 112
M_DQS_A_DP5 M_DATA_A35 DQ34 VDD14 M_DATA_A35 DQ34 VDD14
8 M_DQS_A_DP5 143 117 143 117
M_DQS_A_DP6 M_DATA_A36 DQ35 VDD15 M_DATA_A36 DQ35 VDD15
8 M_DQS_A_DP6 130 118 130 118
M_DQS_A_DP7 M_DATA_A37 DQ36 VDD16 M_DATA_A37 DQ36 VDD16
8 M_DQS_A_DP7 132 123 132 123
M_DATA_A38 DQ37 VDD17 M_DATA_A38 DQ37 VDD17
140 124 140 124
M_DATA_A39 DQ38 VDD18 M_DATA_A39 DQ38 VDD18
142 142
M_DATA_A40 DQ39 M_DATA_A40 DQ39
147 2 147 2
M_DQS_A_DN0 M_DATA_A41 DQ40 VSS M_DATA_A41 DQ40 VSS
8 M_DQS_A_DN0 149 3 149 3
M_DQS_A_DN1 M_DATA_A42 DQ41 VSS M_DATA_A42 DQ41 VSS
8 M_DQS_A_DN1 157 8 157 8
M_DQS_A_DN2 M_DATA_A43 DQ42 VSS M_DATA_A43 DQ42 VSS
8 M_DQS_A_DN2 159 9 159 9
M_DQS_A_DN3 M_DATA_A44 DQ43 VSS M_DATA_A44 DQ43 VSS
8 M_DQS_A_DN3 146 13 146 13
M_DQS_A_DN4 M_DATA_A45 DQ44 VSS M_DATA_A45 DQ44 VSS
8 M_DQS_A_DN4 148 14 148 14
M_DQS_A_DN5 M_DATA_A46 DQ45 VSS M_DATA_A46 DQ45 VSS
8 M_DQS_A_DN5 158 19 158 19
M_DQS_A_DN6 M_DATA_A47 DQ46 VSS M_DATA_A47 DQ46 VSS
8 M_DQS_A_DN6 160 20 160 20
M_DQS_A_DN7 M_DATA_A48 DQ47 VSS M_DATA_A48 DQ47 VSS
8 M_DQS_A_DN7 163 25 163 25
M_DATA_A49 DQ48 VSS M_DATA_A49 DQ48 VSS
165 26 165 26
M_DATA_A50 DQ49 VSS M_DATA_A50 DQ49 VSS
175 31 175 31
M_DQM_A0 M_DATA_A51 DQ50 VSS M_DATA_A51 DQ50 VSS
8 M_DQM_A0 177 32 177 32
M_DQM_A1 M_DATA_A52 DQ51 VSS M_DATA_A52 DQ51 VSS
8 M_DQM_A1 164 37 164 37
M_DQM_A2 M_DATA_A53 DQ52 VSS M_DATA_A53 DQ52 VSS
8 M_DQM_A2 166 38 166 38
M_DQM_A3 M_DATA_A54 DQ53 VSS M_DATA_A54 DQ53 VSS
8 M_DQM_A3 174 43 174 43
M_DQM_A4 M_DATA_A55 DQ54 VSS M_DATA_A55 DQ54 VSS
8 M_DQM_A4 176 44 176 44
M_DQM_A5 M_DATA_A56 DQ55 VSS M_DATA_A56 DQ55 VSS
8 M_DQM_A5 181 48 181 48
M_DQM_A6 M_DATA_A57 DQ56 VSS M_DATA_A57 DQ56 VSS
8 M_DQM_A6 183 49 183 49
M_DQM_A7 M_DATA_A58 DQ57 VSS M_DATA_A58 DQ57 VSS
8 M_DQM_A7 191 54 191 54
M_DATA_A59 DQ58 VSS M_DATA_A59 DQ58 VSS
193 55 193 55
M_DATA_A60 DQ59 VSS M_DATA_A60 DQ59 VSS
180 60 180 60
M_DATA_A61 DQ60 VSS M_DATA_A61 DQ60 VSS
182 61 182 61
DDR_DRAM_RST_N M_DATA_A62 DQ61 VSS M_DATA_A62 DQ61 VSS
8 DDR_DRAM_RST_N 192 65 192 65
M_DATA_A63 DQ62 VSS M_DATA_A63 DQ62 VSS
194 66 194 66
PM_EXTTS0_N DQ63 VSS DQ63 VSS
7 PM_EXTTS0_N 71 71
M_DQS_A_DN0 VSS M_DQS_A_DN0 VSS
10 72 10 72
2
PM_EXTTS1_N M_DQS_A_DN1 DQS0# VSS M_DQS_A_DN1 DQS0# VSS 2
7 PM_EXTTS1_N 27 127 27 127
M_DQS_A_DN2 DQS1# VSS M_DQS_A_DN2 DQS1# VSS
45 128 45 128
M_DQS_A_DN3 DQS2# VSS M_DQS_A_DN3 DQS2# VSS
62 133 62 133
M_DQS_A_DN4 DQS3# VSS M_DQS_A_DN4 DQS3# VSS
135 134 135 134
M_DQS_A_DN5 DQS4# VSS M_DQS_A_DN5 DQS4# VSS
152 138 152 138
M_DQS_A_DN6 DQS5# VSS M_DQS_A_DN6 DQS5# VSS
169 139 169 139
M_DQS_A_DN7 DQS6# VSS M_DQS_A_DN7 DQS6# VSS
186 144 186 144
DQS7# VSS DQS7# VSS
145 145
M_DQS_A_DP0 VSS M_DQS_A_DP0 VSS
12 150 12 150
M_DQS_A_DP1 DQS0 VSS M_DQS_A_DP1 DQS0 VSS
29 151 29 151
M_DQS_A_DP2 DQS1 VSS M_DQS_A_DP2 DQS1 VSS
47 155 47 155
M_DQS_A_DP3 DQS2 VSS M_DQS_A_DP3 DQS2 VSS
64 156 64 156
M_DQS_A_DP4 DQS3 VSS M_DQS_A_DP4 DQS3 VSS
137 161 137 161
M_DQS_A_DP5 DQS4 VSS M_DQS_A_DP5 DQS4 VSS
154 162 154 162
M_DQS_A_DP6 DQS5 VSS M_DQS_A_DP6 DQS5 VSS
171 167 171 167
M_DQS_A_DP7 DQS6 VSS M_DQS_A_DP7 DQS6 VSS
188 168 188 168
DQS7 VSS DQS7 VSS
172 172
M_ODT_A0 VSS M_ODT_A2 VSS
116 173 116 173
M_ODT_A1 ODT0 VSS M_ODT_A3 ODT0 VSS
120 178 120 178
ODT1 VSS ODT1 VSS
179 179
DIMM_VREF_CA VSS DIMM_VREF_CA VSS
126 184 126 184
DIMM_VREF_DQ VREF_CA VSS DIMM_VREF_DQ VREF_CA VSS
1 185 1 185
VREF_DQ VSS VREF_DQ VSS
189 189
DDR_DRAM_RST_N VSS DDR_DRAM_RST_N VSS
30 190 30 190
RESET# VSS RESET# VSS
195 195
VSS VSS
196 196
VSS VSS
203 205 203 205
VTT1 VSS VTT1 VSS
DDR_VREF_S3 204 206 DDR_VREF_S3 204 206
VTT2 VSS VTT2 VSS

DDR3-204P-42-GP DDR3-204P-48-GP

1D5V_S3
R536
1D5V_S3 1KR2F-3-GP
1 R517 1 2 DIMM_VREF_DQ 1
1KR2F-3-GP
1

1 2 DIMM_VREF_CA
1
1

C363 R537
1

SCD1U16V2ZY-2GP 1KR2F-3-GP C364 C353


1
1

C344 R518 (R) SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP


2
2

SCD1U16V2ZY-2GP 1KR2F-3-GP C345 C352


2

(R) SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP Wistron Incorporated


2

2
2

21F, 88, Sec.1,Hsin Tai Wu Rd


PLACE CLOSE TO DIMM Hsichih, Taipei Hsien
PLACE CLOSE TO DIMM
Title
DDR2 DIMM-A & B
Size Document Number Rev
C AIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 11 of 31


A B C D E
A B C D E

4 4

Stitching Caps place close to DIMM: Cross 1.8V and 0.9V


Don't Need.
3 3

Channel A Decoupling Caps close to DIMM


DDR_VREF_S3

1
C126 C125 C124 C123

SCD1U16V2ZY-2GP
2

2
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2010/01/15 2009/11/29 2010/01/15 2010/01/15
Remove C127 Remove C354 Remove C359 Remove C128
2009/11/29
Remove C353

2 2

1D5V_S3 POS-CAP 2010/01/15


1

1
1

1
C368 C343 C348 C588 C589 C590
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP
2

2
2

2
1D5V_S3

2010/01/15
1 1
1
1

C342 C331 C586 C587 C591


SC2D2U10V3KX-1GP SC2D2U10V3KX-1GP SC2D2U10V3KX-1GP SC2D2U10V3KX-1GP SC2D2U10V3KX-1GP
Wistron Incorporated
2
2

21F, 88, Sec.1,Hsin Tai W u Rd


Hsichih, Taipei Hsien
Title
DDR2 DECOPULING
Size Document Number Rev
A3 AIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 12 of 31


A B C D E
A B C D E

RGB
3D3V_S0 +19V_S5_INV Power
7 VGA_RED
VGA_RED
EDID 1 (R) 2 LVDS_LDO_CTL
VGA_GREEN R434 1KR2J-1-GP
7 VGA_GREEN

B
VGA_BLUE 68.00216.191
7 VGA_BLUE

1
72.24C16.S01, ST L24 (S) 2009/11/12
Z=80 ohm,Rdc=0.02 ohm
R459 R460 R461 1 (R) 2 BJTVCC_1E C BJTVCC 1 2 Core_DVCC 3D3V_S0
72.24C16.U01, ATMEL 3D3V_S0 I=5A ,0805
DDC_CLK/DATA U21
4K7R2J-2-GP 4K7R2J-2-GP 4K7R2J-2-GP
3D3V_S0
R444 0R0402-PAD BC869-25-GP
(S) Q40
FCM1608KFG-301T05-GP
(S) 3D3V_S0 DC_19V +19V_S5_INV

2
3D3V_S0 C261 C262

2
MCH_DDC_DATA 1 8 1 (R) 2 (S) SC1U10V3ZY-6GP SCD1U16V2ZY-2GP (S)
7 MCH_DDC_DATA A0 VCC

1
2 7 LVDS_W PPRO R445 0R0402-PAD R448 C31 R929 1 2 0R0805-PAD-1-GP

2
A1 WP

1
7 MCH_DDC_CLK
MCH_DDC_CLK 3
A2 SCL
6 LVDS_EESCL I2CA_SCL_C (S) C50 4K7R2J-2-GP SC1U10V3ZY-6GP Slove panel will be flashed (R)

1
4 5 LVDS_EESDA I2CA_SDA_C 2009/11/12 (R)
when system power on

SCD1U25V3KX-GP
1

2
GND SDA LVDS_CE LVDS_RESET R930 1 0R0805-PAD-1-GP C569 C256
2

SC10U10V5KX-2GP
2
(S) L4 (R)

2
1

2
H/VSYNC AT24C16BN-SHBY-B-2-GP
(72.24C16.U01) C280
2009/11/23
3D3V_S0 1 2 ADC_VDD
FCM1608KFG-301T05-GP (S) L26 (R)
LVDS_GND LVDS_GND
(R) R47 3D3V_S0 3D3V_S0

1
SCD1U10V2MX-3GP C48 1 2 ADC_REF R449 4K7R2J-2-GP

2
HSYNC SC10U10V5ZY-1GP (S) C53 SCD1U16V2ZY-2GP FCM1608KFG-301T05-GP 4K7R2J-2-GP (R)
7 HSYNC

1
SC10U10V5ZY-1GP (S) 2009/12/28

1
1

1
1
4
7 VSYNC
VSYNC C43 R443 INVERTER BOARD CONNECTOR 4

1
(R) C45 SCD1U16V2ZY-2GP R441 10KR2J-3-GP
(S) C264 SC1U10V3ZY-6GP 10KR2J-3-GP (R) DARFON: 19.21066.181

2
SC22U6D3V5MX-2GP (R)
SUMIDA:

2
2
I2CA_SCL_C (S) L25 BKLT_EN
14 I2CA_SCL_C LVDS_CE

2
3D3V_S0
14 I2CA_SDA_C
I2CA_SDA_C
FIRMWARE 3D3V_S0
1 2 PVCC
FCM1608KFG-301T05-GP (S)

1
C260 LVDS_GND LVDS_GND (R) 2009/12/01 +19V_S5_INV

C
(S) FCM1608KFG-301T05 SCD1U16V2ZY-2GP R438 Q41
1 internal MCU

1
(R) C269 Z=300 ohm,Rdc=0.35 ohm LVDS_BL_EN 1 2BKLT_EN1 B MMBT3904-3-GP

2
R479 (S) SC1U10V3ZY-6GP (R84.03904.L06)
10KR2J-3-GP U20 I=0.5A ,0603
0 ext MCU GPU_BL_EN 10KR2J-3-GP INV_CN1

E
1
(S) (R) 2 1
R480 LVDS_CE 1 8 LVDS_GND R456

2
CK_14M_SCALAR 0R2J-2-GP LVDS_SDOUT CE# VCC 100KR2J-1-GP
6 CK_14M_SCALAR 2 7 4 3
LVDS_FLASH_W P LVDS_FLASH_W P_1 SO HOLD# LVDS_SPICLK 2009/11/23
1 2 3 6 6 5
WP# SCK LVDS_SDIN BKLT_EN BKLT_ADJ
4 5 IC before initial,the 8 7

2
GND SIO

1
PANEL_DET (S) state is low
17 PANEL_DET

SC22P50V2JN-4GP
2009/11/12 R478 EC3 JWT-CONN8D-S1-GP
10KR2J-3-GP PM25LD010C-SCE-GP (R) BKL off -> low R935
PANEL_FB BLK on -> on 1 2 (20.60338.204)
14,15 PANEL_FB

Core_DVCC
Core_DVCC
PVCC
2

ADC_VDD

LVDS_SDIN

LVDS_SPICLK
LVDS_SDOUT

LVDS_RESET
0R0402-PAD-1-GP

NC_SCAR_4
LVDS_CE
PANEL_SEL1
17 PANEL_SEL1
PANEL_SEL2
14,17 PANEL_SEL2
PANEL_SEL3
17 PANEL_SEL3
MCU_BKLT_ADJ R949 1 2 0R2J-2-GP
(G)
2009/12/03

51

53
30

24
21

22
23

54
6

4
(S71.02270.00G) U2
AUTO_COLOR_SIO 3D3V_S5 3D3V_S5 3D3V_S5

RST

REXT
PVDD33

DVDD12
DVDD12

ADC_VDD33

SPI_SCL
SPI_SDO
SPI_SDI

SPI_CE
16 AUTO_COLOR_SIO
1

1
R50 R48 R442 3D3V_S0
10KR2J-3-GP 10KR2J-3-GP 10KR2J-3-GP B- 7 40
B+ B- TXE0-
8 39
(S) (S) (S) G- B+ TXE0+ 2009/11/19
9 38
TP24 TP23 TP26 3D3V_S0 G+ G- TXE1-
10 37
2

2
G+ TXE1+

1
GPU_BL_EN TPAD28 PANEL_SEL1 TPAD28 PANEL_SEL2 TPAD28 PANEL_SEL3 R- 12 36
14 GPU_BL_EN R- TXE2-
R+ 13 35 (R) R64
R+ TXE2+
1

1
C38 C33 C263 34 10KR2J-3-GP
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP (S) SCD1U16V2ZY-2GP R54 NC_SCAR_11 TXE3-
11 33
(S) SOG0 TXE3+
10KR2J-3-GP

2
2

2
GPU_PANEL_ON (S) (S) 50 TXO0- (S)
14 GPU_PANEL_ON TXO0-
PANEL_ON 64 49 TXO0+ 2 R59 1 BKLT_ADJ

2
P1_1 TXO0+ TXO1- LVDS_BL_ADJ
48
PANEL_DET LVDS_EESDA TXO1- TXO1+ 100R2J-2-GP
63 47
SMB_CLK_MAIN PANEL_DET P3_2 TXO1+ TXO2-
6,11,17,24 SMB_CLK_MAIN 55 46
P3_3 TXO2-

1
SMB_DATA_MAIN C36 LVDS_BL_EN 25 45 TXO2+
3 6,11,17,24 SMB_DATA_MAIN P3_6/I2C_MDA_1 TXO2+ 3
(S) SCD1U16V2ZY-2GP NC_SCAR_26 26 42 TXO3-
P3_7/I2C_MDL_1 TXO3- TXO3+
41

2
TXO3+
2010/05/19 LVDS_BL_ADJ 20
P5_0/PWM0
PANEL_SEL3 PANEL_SEL1 PANEL_SEL1 27 44 TXOC-
PANEL_SEL2 P5_1/PWM1 RTD2280L-GR-GP TXOC- TXOC+
28 43
PANEL_SEL3 P5_2/PWM2 TXOC+
56
MCU_BKLT_ADJ LVDS_W PPRO P5_3/PWM3
14 MCU_BKLT_ADJ 61
LVDS_EESCL P5_4 ISP_CLK VCC5_PANEL
62 19
D

LVDS_KEY0 P5_5/PWM5 DDC_SCL/RX ISP_DAT (S)


18
14 LVDS_KEY0 Q39 Q59 DDC_SDA/TX Q1 PTWO-CON30-3-GP-U
LVDS_KEY1 LVDS_KEY0 57 5V_S0
14 LVDS_KEY1 2N7002-11-GP 2N7002-11-GP (S) P6_0/ADC0 DMP2130L-7-GP
LVDS_KEY1 58
LVDS_KEY0 (84.2N702.D31) LVDS_KEY1 (84.2N702.D31) R57 PANEL_FB P6_1/ADC1 ADC_REF
G G 59 15 VCC5_PANEL 32
P6_2/ADC2 ADC_RP
AUTO_COLOR_SIO 1 2 AUTO_COLOR_R 60 14 S 30
P6_3 ADC_RN

ADC_GND
D 29

LDO_CTL
S

D
HSYNC
100R2J-2-GP

VSYNC
28

DGND
DGND
DGND

AGND

2
1
XOUT

G
C27 R27 27

XIN
(S) 26

10MR3J-L1-GP
SC10U10V5ZY-1GP
25

2
24

52

16
17

1
2

32
31
29

3
23

1
Close to RTD2270 22
21

PANEL_ON_2
TPAD28 TP7 (S) AUTO_COLOR_SIO 20

LVDS_XTAL_IN_R
TPAD28 TP28 (S) PANEL_DET 19

LVDS_LDO_CTL

LVDS_XTAL_O1
TPAD28 TP27 (S) PANEL_FB TXO3+ 18

LVDS_FLASH_WP
TXO3- 17
2009/11/12 16
RT2270 UPDTE PIN29 AS GPIO TXOC+ 15

AHS
TXOC-

AVS
14
5V_S5 13
TXO2+ 12

PANEL_ON_2
R973
R131 C74 5V_S0 TXO2- 11

1
VGA_RED 1 (R) 2 RED_B 1 2 RED_C 2 1 R+ 10
100R2F-L1-GP-U SCD047U10V2KX-2GP LVDS_GND R822 TXO1+ 9
0R0402-PAD 2009/11/23 100KR2J-1-GP TXO1- 8

1
1

(R) 7
1

R126 C73 R817 TXO0+ 6

2
75R2F-2-GP SC12P50V2JN-3GP 10KR2J-3-GP PANEL_ON_1 1 2 TXO0- 5
(64.38R35.6DL) 4
R123 C72
2

R124 (R) 100R2J-2-GP 3

2
2

1
1 (R) 2 R-_G1 1 2 R-_G 2 1 R- R821 C572 2

C
R816
100R2F-L1-GP-U (63.20434.1DL) SCD1U16V2ZY-2GP
0R0402-PAD 3D3V_S0 3D3V_S0 PANEL_ON 1 2 PANEL_ON_R B Q101 1

2
SCD047U10V2KX-2GP
MMBT3904-3-GP 31
4K7R2J-2-GP

E
1

1
1
GPU_PANEL_ON
R100 R101 R818 (84.03904.L06) 2010/05/04 LVDS1

1
10KR2J-3-GP 10KR2J-3-GP PANEL_ON 100KR2J-1-GP
RAISING TIME 880uF
R974
R118 C70 2009/11/13 0: PANEL POWER OFF
1: PANEL POWER HIGH
(R)
C570

2
2

2
2 VGA_GREEN (R) GREEN_B GREEN_C G+ SC1U16V3KX-2GP 2
1

0R0402-PAD
2 1 2
100R2F-L1-GP-U
2 1
DDC_CLK_VGA R107 1
100R2J-2-GP
2 ISP_CLK CLOSE TO SCALAR IC
1

(R) SCD047U10V2KX-2GP
1

R113 C69 DDC_DATA_VGA R108 1 2 ISP_DAT R626


75R2F-2-GP SC12P50V2JN-3GP 100R2J-2-GP (S)
(64.38R35.6DL) CK_14M_SCALAR 2 1
R111 C67
2

R112
2

1 (R) 2 G-_G1 1 2 G-_G 2 1 G- 0R2J-2-GP


100R2F-L1-GP-U
3D3V_S0
0R0402-PAD
SCD047U10V2KX-2GP
SC15P50V2JN-2-GP R629
Brightness control
(84.27002.C3F) (R) 3D3V_S0

1
1 2 LVDS_XTAL_IN_R1 2 1 LVDS_XTAL_IN_R
Q6
R132

2
1KR2J-1-GP C40 0R2J-2-GP

1
MCH_DDC_CLK 1 6 DDC_CLK_VGA (R) R74 R91
1MR3J-L-GP X1 4K7R2J-2-GP
C62
-
2

R978
R110 ISP_EN_N 2 5 ISP_EN_N (R) X-14D31818M-23GP
VGA_BLUE 1 (R) 2 BLUE_B 1 2 BLUE_C 2 1 B+
(R23.30001.331)

1
2
1

100R2F-L1-GP-U DDC_DATA_VGA 3 4 MCH_DDC_DATA C75 (R) R89 BTN2

2
0R0402-PAD SCD1U16V2ZY-2GP C44 LVDS_KEY0 1 2 BTN0_N_R 1 2
SCD047U10V2KX-2GP
1

1 2 LVDS_XTAL_O 2 1 LVDS_XTAL_O1 33R2J-2-GP


2
1

R106 (R) 2N7002DW -1-GP R75 560R2J-3-GP 3 4

1
75R2F-2-GP C58 (R) C55 SW-TACT-48-GP
(64.38R35.6DL) SC15P50V2JN-2-GP D2 SCD1U16V2ZY-2GP
R104 SC12P50V2JN-3GP C57
2

R105 BAV99PT-GP-U

2
2

1 (R) 2 B-_G1 1 2 B-_G 2 1 B- (83.00099.M11)


100R2F-L1-GP-U
0R0402-PAD

2
SCD047U10V2KX-2GP 3D3V_S0
(S)
R975 1 (R) 2 C56 Function
R455 0R0402-PAD 2 1
VSYNC 1 2 AVS
100R2F-L1-GP-U R976 1 (R) 2 SCD1U16V2ZY-2GP BTN1 Brightness +
1

ISP_CLK R99 1 2 0R2J-2-GP SMB_CLK_MAIN 0R0402-PAD


1

R457 (S) BTN2 Brightness -


(S) 2KR2J-1-GP C266 C59 (R) R977 1 (R) 2

1
SC22P50V2JN-4GP (R)
2

SCD1U16V2ZY-2GP 2009/11/24 0R0402-PAD 3D3V_S0


2

2009/12/28
2

R979 1 (R) 2

2
CRT1 (R)
ISP_EN_N 2 1 (S) 0R0402-PAD R2
LVDS_GND R463 4K7R2J-2-GP
+
LVDS_GND
4 3 HSYNC 1 2 AHS R980 1 (R) 2
X
VGA_RED R943 1 (R) 2 0R2J-2-GP VGA_RED_C 6 5 DDC_CLK_VGA 100R2F-L1-GP-U

1
VGA_GREEN R944 1 (R) 2 0R2J-2-GP VGA_GREEN_C 8 7 DDC_DATA_VGA 0R0402-PAD R1 BTN1
1

VGA_BLUE R945 1 (R) 2 0R2J-2-GP VGA_BLUE_C 10 9 VSYNC_C R946 1 (R) 2 0R2J-2-GP VSYNC (S) LVDS_KEY1 1 2 BTN1_N_R 1 2
1

1 12 11 HSYNC_C R947 1 (R) 2 0R2J-2-GP HSYNC R453 C267 33R2J-2-GP 1


(S) 2KR2J-1-GP SC12P50V2JN-3GP ISP_DAT R102 1 2 0R2J-2-GP SMB_DATA_MAIN LVDS_GND 3 4

1
3
DVD-CONN12D-FP12GP C5 SW-TACT-48-GP
2

(R) D1 SCD1U16V2ZY-2GP
2

2010/05/01 21.62698.206, C61 BAV99PT-GP-U

2
(R) (83.00099.M11)
11pin -1#3, SCD1U16V2ZY-2GP
2

2.0mm pitch

2
LVDS_GND LVDS_GND 3D3V_S0

Wistron Incorporated
21F, 88, Sec.1,Hsin Tai W u Rd
Hsichih, Taipei Hsien
Title
LVDS RTL2270
Size Document Number Rev
D AIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 13 of 31


A B C D E
PCIE_RXN_GPU U30K 10 OF 12

THERMAL PROTECTION
15 PCIE_RXN_GPU PCIE_RXP_GPU 10/12 MISC
15 PCIE_RXP_GPU
15 PCIE_TXN_GPU
PCIE_TXN_GPU
PCIE_TXP_GPU
180mohm@100Mhz, 1.5A U30J 11 OF 12 B10 GPU_ROM_CS*
15 PCIE_TXP_GPU V_1P05_CORE ROM_CS#
0.084mA 11/12 XTAL_PLL GPU_STRAP0
GPU_STRAP1
C7
B9 STRAP0 A10 GPU_ROM_SI
CLK_PCIE_GPU_DP L56 1 2 GPU_PLLVDD GPU_STRAP2 STRAP1 ROM_SI GPU_ROM_SO
6 CLK_PCIE_GPU_DP K5 A9 C10
CLK_PCIE_GPU_DN (G) HCB1608KF-181-GP PLLVDD STRAP2 ROM_SO
C9 GPU_ROM_SCLK
6 CLK_PCIE_GPU_DN

SCD1U10V2MX-3GP

SCD1U10V2MX-3GP
ROM_SCLK

SC4D7U10V3KX-GP
K6
VID_PLLVDD

1
PLTRST_N (G) (G) (G) 40K2R2F-GP
7,17,22,23 PLTRST_N 3D3V_S0
C484 C483 C485 L6 (G) A3
SP_PLLVDD R914 1 2 STRAP_REF0 F11 I2CH_SCL A4 2009/11/23
MULTI_STRAP_REF0_GND I2CH_SDA

2
3D3V_S0
GPU_THERM_SHUTDOWN* R915 1 2 STRAP_REF1 F10
30 GPU_THERM_SHUTDOWN* MULTI_STRAP_REF1_GND

1
(G) (G)
GND D11 E9 40K2R2F-GP N5 C491 2010/05/07
CK_GPU_27M XTAL_SSIN XTAL_OUTBUFF BUFRST# SCD1U16V2ZY-2GP 3D3V_S0

S
6 CK_GPU_27M

2
GND (G)

2
CK_GPU_27M R916 1 2 GPU_27M_P3 D10 E10 GPU_PLTRST 2 R657 1 GPU_PLTRST_R G Q75
GPU_BL_EN 0R0402-PAD-1-GP XTAL_IN XTAL_OUT PMBS3906-GP 1 GPU_3D3V_S0_THERM R940 1 (G) 2
13 GPU_BL_EN AO3413-GP
GPU_PANEL_ON (G) GT218-ION-A3-GP N2 Q102 2KR2J-1-GP 10KR2J-3-GP
13 GPU_PANEL_ON NC#N2

1
(G71.GT218.B0U) GT218-ION-A3-GP (G84.02130.031)

1
R649 (R)

GPU_3D3V_S0_THERM_2

D
SMB_CLK_GPU 0R2J-2-GP F9 AD25 GPU_TESTMODE GPU_THERM_SHUTDOWN* R939 1 (G) 2 GPIO8_THERM_OVERT* C487 3D3V_S0_PORT
17 SMB_CLK_GPU NC#F9 TESTMODE 30 GPU_THERM_SHUTDOWN*

1
SMB_DATA_GPU (R) (G) (G) 2KR2J-1-GP SC100P50V2JN-3GP

D
17 SMB_DATA_GPU X6

2
F6 R906

C
GND

2
GPU_27M_P1 1 4 10KR2J-3-GP Q34 (G) Q58
I2CA_SCL_C AC6 MMBT3904-3-GP BGPU_THERM_SHUTDOWN*_1
2 1 2 R647 1 GPU_THERM_SHUTDOWN*_2 B (G) 2N7002-11-GP
13 I2CA_SCL_C GND
I2CA_SDA_C (G84.03904.L06) 10KR2J-3-GP PLTRST_N 1 R645 2 PLTRST_N_1A G (G84.2N702.D31)
13 I2CA_SDA_C

2
2 3 GPU_27M_P2 (G) Q33

E
1
MCU_BKLT_ADJ (G71.GT218.B0U) R646 MMBT3904-3-GP 1KR2J-1-GP

S
1

1
13 MCU_BKLT_ADJ C567 GND GND 10KR2J-3-GP (G84.03904.L06)

1
LVDS_KEY0 SC22P50V2JN-4GP XTAL-27MHZ-74-GP C568 C574 (G)
13 LVDS_KEY0

1
LVDS_KEY1 (R) (R) SC22P50V2JN-4GP C575 SC1KP50V2JN-2GP C478
13 LVDS_KEY1

2
(R) SC1KP50V2JN-2GP (G) (G78.10224.2FL) SC100P50V2JN-3GP

2
(G78.10224.2FL) R331
GND GND 33KR2J-3-GP
DACB_HSYNC
HARDWARE STRAPPING

2
26 DACB_HSYNC DACB_VSYNC
26 DACB_VSYNC 3D3V_S0 3D3V_S0
DACB_RED
26 DACB_RED DACB_GREEN 2009/11/21

1
26 DACB_GREEN DACB_BLUE (R)

1
1
1

1
26 DACB_BLUE R905 3D3V_S0
I2CB_SCL R917 R918 R919 R920 R922 R921 10KR2J-3-GP
26 I2CB_SCL
I2CB_SDA 2KR2J-1-GP 2KR2J-1-GP 2KR2J-1-GP 2KR2J-1-GP 4K99R2F-L-GP 2KR2J-1-GP
26 I2CB_SDA V_1P05_CORE (R) (R) (R) (R) (G) (R)

2
PANEL_SEL2 U30A 1 OF 12 (R)
13,17 PANEL_SEL2 L52

2
2
2

2
2
PANEL_FB 1/12 PCI_EXPRESS 1.700 Amps U22

LVDS CONN
13,15 PANEL_FB
AC9 1 2
PEX_IOVDD PEX_IOVDD
GPU_ROM_SI GPU_ROM_CS* 1 8
AD7
PEX_IOVDD CE# VCC

1
1

1
AD8 C423 C430 C436 C441 HCB1608KF-300-GP GPU_ROM_SO GPU_ROM_SO 2 7
PEX_IOVDD (G) (G) (G) (G63.00000.00L) GPU_ROM_SCLK SO HOLD# GPU_ROM_SCLK
AE7 3 6
PEX_IOVDD WP# SCK

SC1U6D3V2KX-GP
SC1U6D3V2KX-GP

SC10U6D3V5MX-3GP
PEX_IOVDD
AF7 30mohm@100Mhz, 3A GPU_STRAP2 4
GND SIO
5 GPU_ROM_SI

2
2

SC4D7U10V3KX-GP
U30I 12 OF 12 AG7 GPU_STRAP1
PEX_IOVDD GPU_STRAP0
12/12 GND_NC

1
PM25LD010C-SCE-GP VCC5_PANEL (G)
AC11 C15 AE9 AB13 C486 U30E 5 OF 12
GND NC#C15 PEX_CLKREQ# PEX_IOVDDQ

1
AC14 D15 AB16 (R) 5/12 IFPAB PTWO-CON30-3-GP-U
GND NC#D15 PEX_IOVDDQ

2
AC17 J5 AB17 R926 R927 R928 R923 R924 R925 V4 GPU_TXO0-
AC2 GND NC#J5 PEX_IOVDDQ
AB7 20KR2F-L-GP 10KR2F-2-GP 34K8R2F-1-GP 24K9R2F-L-GP 4K99R2F-L-GP 4K99R2F-L-GP SCD1U10V2MX-3GP IFPA_TXD0# GPU_TXO0+
V5 32
GND PEX_IOVDDQ IFPA_TXD0

1
AC20 AF10 AB8 GND (G) (G) (G) (G) (R) (G) V_1P05_CORE C21 (G) C28 (G) 30
GND PEX_TSTCLK_OUT PEX_IOVDDQ
AC23
GND
AE10
PEX_TSTCLK_OUT# PEX_IOVDDQ
AB9 (G78.10620.51L)
180mohm@100Mhz, 1.5A 29

1
1

SC1U10V3ZY-6GP

SC10U10V5ZY-1GP
AC26
GND PEX_IOVDDQ
AC13 (G) (G) (G)
200mA IFPA_TXD1#
AA4 GPU_TXO1- 28

2
AC5 AC7 C422 C429 C435 AA5 GPU_TXO1+ 27
GND PEX_IOVDDQ IFPA_TXD1

SC1U6D3V2KX-GP
SC1U6D3V2KX-GP

SC4D7U10V3KX-GP
AC8 AD6 GND L55 1 2 HCB1608KF-181-GP IFPAB_PLLVDD AD5 26
GND PEX_IOVDDQ

2
IFPAB_PLLVDD

2
AF11
GND
PLTRST_N AD9
PEX_RST# PEX_IOVDDQ
AE6 2009/11/23 (G) IFPAB_RSET AB6
IFPAB_RSET
A 25
AF14 AF6 GND Y4 GPU_TXO2- 24
GND PEX_IOVDDQ IFPA_TXD2#

1
AF17 AG6 W4 GPU_TXO2+ 23
AF2 GND PEX_IOVDDQ (G) C481 (G) C482 IFPA_TXD2
22
GND

1
AF20 CLK_PCIE_GPU_DP AB10 3D3V_S0 21
GND PEX_REFCLK

2
AF23 CLK_PCIE_GPU_DN AC10 (G) AB5 GPU_TXO3- 20
AF26 GND (G) SCD1U10V2MX-3GP PEX_REFCLK# SC4D7U10V3KX-GP SC1U6D3V2KX-GP R932 IFPA_TXD3# GPU_TXO3+
AB4 19
GND PCIE_RXP_GPU PCIE_RXP_GPU_C GND IFPA_TXD3 GPU_TXO3+
AF5 C249 1 2 AD10 1KR2J-1-GP 18
GND PEX_TX0

1
1

10KR2J-3-GP
10KR2J-3-GP
AF8
GND
PCIE_RXN_GPU C247 1 2 PCIE_RXN_GPU_C AD11
PEX_TX0#
PLACE NEAR GPU DATA GPU_TXO3- 17

2
B11 (G) SCD1U10V2MX-3GP R909 R910 R911 2009/11/21 V1 16
B14 GND PCIE_TXP_GPU AE12 (R) (R) 180R2J-1-GP IFPB_TXD4# GPU_TXOC+
W1 15
GND PCIE_TXN_GPU AF12 PEX_RX0 NVVDD (R) IFPB_TXD4 GPU_TXOC- 14
PEX_RX0# GND GND GT218-ION-A3-GP
B17 13
GND

2
2
B2 GT218-ION-A3-GP AD12 J10 9.6 Amps 2009/11/23 3D3V_S0_PORT W2 GPU_TXO2+ 12
GND PEX_TX1 VDD IFPB_TXD5#
B20
GND
AC12
PEX_TX1# VDD
J12 U30L 9 OF 12
180mohm@100Mhz, 1.5A W3 GPU_TXO2- 11

1
IFPB_TXD5

1
B23
B26
GND AG12 VDD
J13
J9
C252
(G)
C420
(G)
C443
(G)
C564
SCD047U16V2KX-1-GP
9/12 I2C_GPIO_THERM_JTAG (G)
0R0402-PAD-1-GP
230mA B GPU_TXO1+
10
9
GND PEX_RX1 VDD GPU_THERMDC I2CA_SCL R912 1 I2CA_SCL_C L54 1 2 HCB1608KF-181-GP IFPAB_IOVDD GPU_TXO1-
B5 AG13 L9 (G78.47323.2FL) D8 R1 2 V3 AA3 8
GND PEX_RX1# VDD

2
THERMDN I2CA_SCL IFPA_IOVDD IFPB_TXD6#

2
B8 M11 SCD01U16V2KX-3GP (G) TP56 TPAD28 T3 I2CA_SDA R913 1 2 I2CA_SDA_C (G) AA2 7
GND VDD SCD01U16V2KX-3GP GPU_THERMDP I2CA_SDA IFPB_TXD6 GPU_TXO0+
E11 AB11 M17 SCD1U10V2MX-3GP D9 V2 6
GND PEX_TX2 VDD

1
THERMDP IFPB_IOVDD

1
E17 AB12 M9 (G) TP57 TPAD28 R2 I2CB_SCL 0R0402-PAD-1-GP GPU_TXO0- 5
GND PEX_TX2# VDD GPU_JTAG_TCLK I2CB_SCL I2CB_SDA (G) (G) C479 (G) C480
E2 N11 AF3 R3 AA1 4
E20 GND AF13 VDD
N12 (G) TP58 TPAD28 GPU_JTAG_TMS JTAG_TCK I2CB_SDA IFPB_TXD7#
AF4 AB1 3
GND PEX_RX2 VDD

2
1

1
JTAG_TMS IFPB_TXD7

2
E23 AE13 N13 C421 C426 C566 C438 (G) TP59 TPAD28 GPU_JTAG_TDI AG4 A2 2
E26 GND PEX_RX2# VDD N14 (G) (G) (G) (G) GND (G) TP60 TPAD28 GPU_JTAG_TDO JTAG_TDI I2CC_SCL SCD1U10V2MX-3GP SC1U6D3V2KX-GP
AE4 B1
E5 GND AD13 VDD N15 (G) TP61 TPAD28 GPU_JTAG_TRST* JTAG_TDO I2CC_SDA GPU_TXOC-
AG3 AD4 1
GND PEX_TX3 VDD

2
JTAG_TRST# IFPA_TXC#

2
E8
GND
AD14
PEX_TX3# VDD
N16 SCD01U16V2KX-3GP SC4D7U10V3KX-GP (G) TP62 TPAD28 A IFPA_TXC
AC4 GPU_TXOC+ 31
H2 N17 SCD01U16V2KX-3GP SCD22U6D3V2KX-1GP
GND VDD
H5
GND
AE15
PEX_RX3 VDD
N19 CLOCK
J11 AF15 N9 AB2 LVDS2
GND PEX_RX3# VDD

1
IFPB_TXC#

1
J14
GND VDD
P11 GND B IFPB_TXC
AB3
J17 AD15 P12 (G) R907 R908 (R)
GND PEX_TX4 VDD

1
1
AC15 P13 C444 C427 C565 (G) (G) GND 10KR2J-3-GP 270R2J-L-GP
PEX_TX4# VDD

1
K19 P14 (G) (G) C445 C596 N1 GPU_GPIO0
GND VDD IFPAB_HPD GPIO0
K9 AG15 P15 GT218-ION-A3-GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
GND PEX_RX4 VDD

2
2
2

2
L11 AG16 P16 SCD047U16V2KX-1-GP SMB_CLK_GPU T1 C1
GND PEX_RX4# VDD I2CS_SCL GPIO2

1
L12 P17 SCD1U10V2MX-3GP SCD01U16V2KX-3GP SMB_DATA_GPU T2 M2 GPU_PANEL_ON (G)
GND VDD (G78.47323.2FL) I2CS_SDA GPIO3 GPU_BL_EN
L13 AB14 R11 M3 (G71.GT218.B0U) R931
GND PEX_TX5 VDD GPIO4 100KR2J-1-GP
L14 AB15 R12 K3
L15 GND PEX_TX5# VDD
R13 GND GND GPIO5
K2
L16 GND AF16
VDD
R14 2009/11/21 GPIO6
J2
GND PEX_RX5 VDD GPIO7

2
L17 AE16 R15 C2 GPIO8_THERM_OVERT*
GND PEX_RX5# VDD GND GPIO8
L2 R16 M1
L5 GND AC16
VDD
R17 GPIO9 2009/11/21
D2
GND PEX_TX6 VDD 20100119 GPIO10
M12 AD16 R9 D1

1
GND PEX_TX6# VDD GPIO11

1
M13 T11 PLACE close to GPU J3
GND VDD GPIO12 R933
M14 AE18 T17 J1 R934
GND PEX_RX6 VDD GPIO13 10KR2J-3-GP
M15 AF18 T9 K1 10KR2J-3-GP
M16 GND PEX_RX6# VDD U19 GPIO14 (G) (G)
T6

DAC MCU
P19 GND AD17 VDD U9 DBG_DATA0 U30C 3 OF 12
W6 G3

2
GND PEX_TX7 VDD DBG_DATA1 GPIO16

2
P2 AD18 W10 Y6 G2 3/12 DACA
GND PEX_TX7# VDD DBG_DATA2 GPIO17 2009/11/21
P23 W12 AA6 F1
P26 GND AG18 VDD W13 DBG_DATA3 GPIO18
N3
GND AG19 PEX_RX7 VDD
W18 2009/11/20 DBG_DATA4 DACA_VDD AG2
PEX_RX7# VDD DACA_VDD
P5 W19
P9 GND AC18 VDD W9 2009/12/02 2010/05/20
AF1 AD2
GND PEX_TX8 VDD NVVDD_SENSE DACA_VREF DACA_HSYNC
T12 AB18 (G71.GT218.B0U) AD1 PANEL_FB -> Support touch panel
GND PEX_TX8# DACA_VSYNC
T13
GND
AE1
DACA_RSET 3D3V_S0
LVDS_KEY0 -> MINUS PANEL_SEL2 -> To load default
T14 AF19
GND PEX_RX8 LVDS_KEY1 -> PLUS

1
T15 AE19 W15 NVVDD_SENSE (G) AE2 U35 (G71.48064.B01)
T16 GND PEX_RX8# VDD_SENSE W16 R897 DACA_RED
GND GND_SENSE 10KR2J-3-GP
U11 AB19 AE3 12 6
GND PEX_TX9 TP_SENSE_1 TP64 DACA_GREEN VDD PB0
U12 AB20 E15 7
GND PEX_TX9# VDD_SENSE E14 TPAD28 3D3V_S0 PB1
U13 AD3 8
GND GND_SENSE DACA_BLUE

2
PB2

1
U14 AE21 (G) (G) LVDS_KEY1 4 9 PANEL_SEL2

DVI/HDMI (NO USE)


GND PEX_RX9 A12 0.157 Amps LVDS_KEY0 PA0/PFD PB3 PANEL_FB
U15 AF21 C578 3 10
GND PEX_RX9# VDD33 SCD1U16V2ZY-2GP MCU_BKLT_ADJ PA1/PFD# PB4
U16 B12 2 11
GND VDD33
1
1

PA2/TC0 PB5

2
U17 AD19 C12 (R) (R) (G) MCU_SDA 1
GND PEX_TX10 VDD33 D12 C432 C447 C433 GND MCU_SCL PA3/INT
U2 AD20 16
SCD1U10V2MX-3GP

GND PEX_TX10# VDD33 PA4


SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
U23 E12 (G71.GT218.B0U) 15
GND VDD33
2

U26 AG21 F12 3D3V_S0 GT218-ION-A3-GP PA5/OSC2


14
GND PEX_RX10 VDD33 U30F 7 OF 12 PA6/OSC1
U5 AG22 U30H 6 OF 12 U30G 8 OF 12 13 5
GND PEX_RX10# PA7/RES# VSS
V19 6/12 IFPC 7/12 IFPD 8/12 IFPE
GND

2
V9 AD21 GND 3D3V_S0
GND AC21
PEX_TX11 L58 HT48R063-16NSOP-GP
PEX_TX11# AG9 0.160 Amps N6
W11 P6 D7 HCB1608KF-181-GP
GND PEX_SVDD_3V3 GND IFPC_PLLVDD IFPD_PLLVDD IFPE_PLLVDD
W14 AF22 R5 M6 F8 (G)
GND PEX_RX11 IFPC_RSET IFPD_RSET IFPE_RSET U30D 4 OF 12
W17 AE22
GND PEX_RX11#
Y2 4/12 DACB
GND

1
Y23 AB21
Y26 GND AB22 PEX_TX12
Y5 GND PEX_TX12# DACB_VDD W5 3D3V_S0
GND D4 DACB_VDD
AE24 G5 G6
PEX_RX12 V_1P05_CORE IFPC_AUX_I2CW_SDA# IFPD_AUX_I2CX_SDA# IFPE_AUX_I2CY_SDA# (G) DACB_VREF DACB_HSYNC
AF24 G4 D3 F7 (G) (G) R6 U6
PEX_RX12# IFPC_AUX_I2CW_SCL IFPD_AUX_I2CX_SCL IFPE_AUX_I2CY_SCL C609 DACB_VREF DACB_HSYNC DACB_VSYNC 2010/05/01
L53
R898 C608 U4
DACB_VSYNC

1
AC22 V6 2K bit EEPROM to save brightness

SCD1U10V2MX-3GP
DACB_RSET

1
PEX_TX13

1
SC1U6D3V2KX-GP
10KR2J-3-GP
GND AD22 AF9 0.080 Amps 1 2 J4 B4 E7 DACB_RSET
PEX_TX13# PEX_PLLVDD IFPC_L3# IFPD_L3# IFPE_L3# DACB_RED
H4 B3 E6 T5 U36 (G)
IFPD_L3 DACB_RED
1

IFPC_L3 IFPE_L3

1
1

AG24 (R) (G) (G) FCM1608KFG-301T05-GP

1
2
PEX_RX13

2
AF25 C448 C434 C439 (G) K4 C4 B7 (G) (G) T4 DACB_GREEN 1 8
PEX_RX13# IFPD_L2# DACB_GREEN
SCD1U10V2MX-3GP

IFPC_L2# IFPE_L2# E0 VCC

2
SC1U6D3V2KX-GP

SC4D7U10V3KX-GP

L4 C3 B6 C610 R986 2 7
IFPD_L2
2

IFPC_L2 IFPE_L2 E1 WC#


2

AD23 J6 R4 DACB_BLUE 3 6 MCU_SCL

2
PEX_TX14 IFPCD_IOVDD GT218-ION-A3-GP D5 DACB_BLUE E2 SCL MCU_SDA
(G71.GT218.B0U) AD24 M4 GT218-ION-A3-GP A7 4 5

SCD1U10V2MX-3GP
PEX_TX14# IFPC_L1# IFPD_L1# IFPE_L1#

2
VSS SDA

121R2F-GP
M5 E4 A6
IFPC_L1 IFPD_L1 IFPE_L1

2
2

2
AG25
PEX_RX14
2010/06/09 AG26
PEX_RX14#
GND
GT218-ION-A3-GP IFPC_L0#
IFPC_L0
N4
P4
IFPD_L0#
IFPD_L0
F4
F5 IFPE_L0#
IFPE_L0
C6
D6 GND GND GND GND GND
R987
(G)
R988
(G)
R989
(G)
M24C02-WMN6TP-GP-U

AE25 (G71.GT218.B0U)
B&S: KG.3200V.003 AE26
PEX_TX15
PEX_TX15#
GT218-ION-A3-GP

1
1

1
G1 F2 H6 F3
Wistron: 71.GT218.B0U AF27
PEX_RX15 PEX_TERMP
AG10 PEX_TERMP R904 1 2 2K4R2J-GP GPIO1 GPIO19 IFPE_IOVDD GPIO15

150R2F-1-GP
150R2F-1-GP

150R2F-1-GP
AE27 (G)
PEX_RX15#
(G71.GT218.B0U) (G71.GT218.B0U) (G71.GT218.B0U)
GT218-ION-A3-GP GND

(G71.GT218.B0U)

FB BUS FBA_D0 D22


U30B
2/12 FRAME_BUFFER

FBA_D0
2 OF 12

2.54 Amps
FBVDDQ
PD REQUIRED FOR INITIALIZATION
FBVDDQ PLACE Close to MEM1 FBVDDQ PLACE Close to MEM3

1
1
1
1

1
1

1
1

1
FBA_D1 E24 A13 C424 C425 C431 C428 C475 C460 C459
FBA_D2 E22 FBA_D1 FBVDDQ
B13 ODT CKE C446 C449 C451 C450 C452 C476 C461 C474 C473 C463
FBA_D2 FBVDDQ
1

1
1

1
1

FBA_D3 D24 C13 (G) (G) (R) (G) (G) FBA_CMD30 FBA_CMD18
FBA_D3 FBVDDQ

2
2
2
2

2
2

2
2

2
FBA_D4 D26 D13 C195 C209 C233 C242 C244
FBA_D4 FBVDDQ
1

FBA_D5 D27 D14 SCD1U10V2MX-3GP SCD1U10V2MX-3GP SCD1U10V2MX-3GP SCD1U10V2MX-3GP SCD1U10V2MX-3GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP SCD1U10V2MX-3GP SCD1U10V2MX-3GP SCD1U10V2MX-3GP SCD1U10V2MX-3GP SCD1U10V2MX-3GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP
FBA_D5 FBVDDQ
2

2
2

2
2

SC1U6D3V2KX-GP RST R900


FBA_D6 C27 E13 SC1U6D3V2KX-GP SC4D7U10V3KX-GP (G) R901
B27 FBA_D6 FBVDDQ SC1U6D3V2KX-GP (G) 10KR2J-3-GP 10KR2J-3-GP
FBA_D7 F13 SCD1U10V2MX-3GP FBA_CMD15
FBA_D7 FBVDDQ (G) (G) (G) (G) (G) (G) (G) (G) (G) (G) (G) (G) (G) (G) (G) (G) (G)
FBA_D8 A21 F14
FBA_D8 FBVDDQ
1

FBA_D9 B21 F15


FBA_D9 FBVDDQ
2

FBA_D10 C21 F16 R899 GND GND


FBA_D10 FBVDDQ
1
1

FBA_D11 C19 F17 (G) (G) (G) (G) (G) 10KR2J-3-GP


FBA_D11 FBVDDQ C202 GND GND GND
FBA_D12 C18 F19 C191 C221 C235
FBA_D12 FBVDDQ
FBA_D13 D18 F22
FBA_D13 FBVDDQ
2
2

FBA_D14 B18 H23 SCD1U10V2MX-3GP SCD01U16V2KX-3GP


FBA_D15 C16 FBA_D14 FBVDDQ H26 SC1U6D3V2KX-GP SCD01U16V2KX-3GP ODT CKE
FBA_D16
FBA_D17
E21
F21
FBA_D15
FBA_D16
FBVDDQ
FBVDDQ
J15
J16
GND FBA_CMD28 FBA_CMD7 FBVDDQ PLACE Close to MEM2 FBVDDQ PLACE Close to MEM4
FBA_D17 FBVDDQ
1

FBA_D18 D20 J18


FBA_D19 F20 FBA_D18 FBVDDQ J19 R903 (G) R902
FBA_D19 FBVDDQ
1

FBA_D20 D17 L19 (G) (G) GND (G) 10KR2J-3-GP 10KR2J-3-GP


FBA_D20 FBVDDQ

1
1
1

1
1

1
1

1
FBA_D21 F18 L23 C245 C201 C442 C440 C437 C472 C467 C464 C465
FBA_D22 D16 FBA_D21 FBVDDQ L26 C458 C456 C455 C454 C471 C466 C470 C468
FBA_D22 FBVDDQ
2
2

FBA_D23 E16 M19 SCD1U10V2MX-3GP


FBA_D23 FBVDDQ PLACE Close to GPU

2
2

2
2

2
2

2
FBA_D24 A22 N22 SCD1U10V2MX-3GP
FBA_D24 FBVDDQ GND GND SC1U6D3V2KX-GP SCD1U10V2MX-3GP SC1U6D3V2KX-GP
FBA_D25 C24 U22 SCD1U10V2MX-3GP SCD1U10V2MX-3GP SCD1U10V2MX-3GP SCD1U10V2MX-3GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP SCD1U10V2MX-3GP SCD1U10V2MX-3GP SCD1U10V2MX-3GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP
FBA_D25 FBVDDQ
FBA_D26 D21 Y22
FBA_D27 B22 FBA_D26 FBVDDQ
FBA_D28 C22 FBA_D27 (G) (G) (G) (G) (G) (G) (G) (G) (G) (G) (G) (G) (G) (G) (G)
FBA_D29 A25 FBA_D28 GND
FBA_D30 B25 FBA_D29 GND GND
FBA_D30
FBA_D31 A26
FBA_D31
FBA_D32 U24
FBA_D32
FBA_D33 V24
FBA_D34 V23 FBA_D33
FBA_D34
FBA_D35 R24
FBA_D35
FBA_D36 T23 F26 FBA_CMD0 FBVDDQ FBVDDQ
FBA_D36 FBA_CMD0 FBVDDQ
FBA_D37 R23 J24 FBA_CMD1
FBA_D37 FBA_CMD1 CMD-Addr Map FBVDDQ
FBA_D38 P24 F25 FBA_CMD2 MEM1 MEM2
P22 FBA_D38 FBA_CMD2 MEM3
FBA_D39 M23 FBA_CMD3

AC24 FBA_D39 FBA_CMD3


FBA_D40 N27 FBA_CMD4
GT218 GT218 K8 E3 FBA_D19 K8 E3 FBA_D6 MEM4
AB23 FBA_D40 FBA_CMD4 VDD DQL0 VDD DQL0 K8 E3
FBA_D41 M27 FBA_CMD5
<31..0> <63..32> ADDR K2 F7 FBA_D21 K2 F7 FBA_D7 FBA_D36
FBA_D41 FBA_CMD5 VDD DQL1 VDD DQL1 VDD DQL0
FBA_D42 AB24 K26 FBA_CMD6 N1 F2 FBA_D18 N1 F2 FBA_D1 K2 F7 FBA_D35 K8 E3 FBA_D41
FBA_D42 FBA_CMD6 VDD DQL2 VDD DQL2 VDD DQL1 F2 VDD DQL0
FBA_D43 W24 J25 FBA_CMD7
CMD19 CMD19 A<0> R9 F8 FBA_D22 R9 F8 FBA_D3 N1 FBA_D34 K2 F7 FBA_D47
FBA_D43 FBA_CMD7 VDD DQL3 VDD DQL3 VDD DQL2 VDD DQL1
FBA_D44 AA22 J27 FBA_CMD8
CMD25 CMD25 A<1> B2 H3 FBA_D17 B2 H3 FBA_D5 R9 F8 FBA_D37 N1 F2 FBA_D44
FBA_D44 FBA_CMD8 VDD DQL4 VDD DQL4 B2 VDD DQL3 VDD DQL2
FBA_D45 W23 G23 FBA_CMD9
CMD22 CMD4 A<2> D9 H8 FBA_D23 D9 H8 FBA_D0 H3 FBA_D32 R9 F8 FBA_D46
FBA_D45 FBA_CMD9 VDD DQL5 VDD DQL5 VDD DQL4 VDD DQL3
FBA_D46 W22 G26 FBA_CMD10
CMD24 CMD6 A<3> G7 G2 FBA_D16 G7 G2 FBA_D4 D9 H8 FBA_D39 B2 H3 FBA_D42
FBA_D46 FBA_CMD10 VDD DQL6 VDD DQL6 G7 VDD DQL5 G2 VDD DQL4
FBA_D47 V22 J23 FBA_CMD11
CMD0 CMD5 A<4> R1 H7 FBA_D20 R1 H7 FBA_D2 2009/11/27 FBA_D33 D9 H8 FBA_D43
FBA_D47 FBA_CMD11 VDD DQL7 VDD DQL7 VDD DQL6 VDD DQL5
FBA_D48 AA25 M25 FBA_CMD12
CMD2 CMD13 A<5> N9 N9 R1 H7 FBA_D38 G7 G2 FBA_D40
FBA_D48 FBA_CMD12 VDD VDD VDD DQL7 VDD DQL6
FBA_D49 W27 K27 FBA_CMD13
CMD21 CMD21 A<6> D7 FBA_D15 D7 FBA_D24 N9 R1 H7 FBA_D45
FBA_D49 FBA_CMD13 DQU0 DQU0 VDD VDD DQL7
FBA_D50 W26 G25 FBA_CMD14
CMD16 CMD16 A<7> A8 C3 FBA_D11 A8 C3 FBA_D29 D7 FBA_D60 N9
FBA_D50 FBA_CMD14 VDDQ DQU1 VDDQ DQU1 A8 DQU0 C3 VDD
FBA_D51 W25 L24 FBA_CMD15
CMD23 CMD23 A<8> A1 C8 FBA_D13 A1 C8 FBA_D28 FBA_D61 D7 FBA_D50
FBA_D51 FBA_CMD15 VDDQ DQU2 VDDQ DQU2 VDDQ DQU1 DQU0
FBA_D52 AB25 K23 FBA_CMD16
CMD20 CMD20 A<9> C1 C2 FBA_D8 2009/11/27 C1 C2 FBA_D30 A1 C8 FBA_D63 2009/11/27 A8 C3 FBA_D53
FBA_D52 FBA_CMD16 VDDQ DQU3 VDDQ DQU3 C1 VDDQ DQU2 C2 VDDQ DQU1
FBA_D53 AB26 K24 FBA_CMD17
CMD17 CMD17 A<10> C9 A7 FBA_D14 C9 A7 FBA_D26 FBA_D56 A1 C8 FBA_D49
FBA_D53 FBA_CMD17 VDDQ DQU4 VDDQ DQU4 VDDQ DQU3 VDDQ DQU2
FBA_D54 AD26 G22 FBA_CMD18
CMD9 CMD9 A<11> D2 A2 FBA_D9 D2 A2 FBA_D25 C9 A7 FBA_D57 C1 C2 FBA_D52 2009/11/27
FBA_D54 FBA_CMD18 VDDQ DQU5 VDDQ DQU5 VDDQ DQU4 VDDQ DQU3
FBA_D55 AD27 K25 FBA_CMD19
CMD14 CMD14 A<12> E9 B8 FBA_D12 E9 B8 FBA_D27 D2 A2 FBA_D59 C9 A7 FBA_D48
FBA_D55 FBA_CMD19 VDDQ DQU6 VDDQ DQU6 E9 VDDQ DQU5 B8 VDDQ DQU4
FBA_D56 V25 H22 FBA_CMD20
CMD12 CMD12 BA0 F1 A3 FBA_D10 F1 A3 FBA_D31 FBA_D62 D2 A2 FBA_D54
FBA_D56 FBA_CMD20 VDDQ DQU7 VDDQ DQU7 F1 VDDQ DQU6 VDDQ DQU5
FBA_D57 R25 M26 FBA_CMD21
CMD3 CMD3 BA1 H9 H9 A3 FBA_D58 E9 B8 FBA_D51
FBA_D57 FBA_CMD21 VDDQ VDDQ VDDQ DQU7 VDDQ DQU6
FBA_D58 V26 H24 FBA_CMD22
CMD27 CMD27 BA2 H2 C7 FBA_DQS_WP1 H2 C7 FBA_DQS_WP3 H9 F1 A3 FBA_D55
FBA_D58 FBA_CMD22 VDDQ DQSU VDDQ DQSU H2 VDDQ C7 VDDQ DQU7
FBA_D59 V27 F27 FBA_CMD23
CMD1 CMD1 RAS* B7 FBA_DQS_RN1 B7 FBA_DQS_RN3 FBA_DQS_WP7 H9
FBA_D59 FBA_CMD23 DQSU# DQSU# VDDQ DQSU B7 VDDQ
FBA_D60 R26 J26 FBA_CMD24
CMD10 CMD10 CAS* FB_VREF_A H1 FB_VREF_A H1 FBA_DQS_RN7 H2 C7 FBA_DQS_WP6
FBA_D60 FBA_CMD24 VREFDQ VREFDQ DQSU# VDDQ DQSU
FBA_D61 T25 G24 FBA_CMD25
CMD11 CMD11 WE* M8 F3 FBA_DQS_WP2 M8 F3 FBA_DQS_WP0 FB_VREF_B H1 B7 FBA_DQS_RN6
FBA_D61 FBA_CMD25 VREFCA DQSL VREFCA DQSL VREFDQ F3 DQSU#
FBA_D62 N25 G27 FBA_CMD26
CMD29 CMD8 CS0* R893 1 2 243R2F-2-GP MEM_ZQ1 L8 G3 FBA_DQS_RN2 R894 1 2 243R2F-2-GP MEM_ZQ2 L8 G3 FBA_DQS_RN0 M8 FBA_DQS_WP4 FB_VREF_B H1
FBA_D62 FBA_CMD26 ZQ DQSL# ZQ DQSL# VREFCA DQSL VREFDQ
FBA_D63 N26 M24 FBA_CMD27
CMD15 CMD15 RST R895 1 2 243R2F-2-GP MEM_ZQ3 L8 G3 FBA_DQS_RN4 M8 F3 FBA_DQS_WP5
FBA_D63 FBA_CMD27 ZQ DQSL# VREFCA DQSL
K22 FBA_CMD28
CMD18 CMD7 CKE (G) K1 FBA_CMD30
(G) K1 FBA_CMD30 R896 1 2 243R2F-2-GP MEM_ZQ4 L8 G3 FBA_DQS_RN5
FBA_CMD28 ODT ODT K1 ZQ DQSL#
J22 FBA_CMD29
CMD30 CMD28 ODT
FBA_CMD19 N3 FBA_CMD19 N3 (G) FBA_CMD28
FBA_CMD29 A0 A0 ODT
FBA_DQM0 C26 L22 FBA_CMD30
CMD26 CMD26 A<13>
FBA_CMD25 P7 FBA_CMD25 P7 FBA_CMD19 N3 (G) K1 FBA_CMD28
FBA_DQM0 FBA_CMD30 A1 A1 P7 A0 ODT
FBA_DQM1 B19 FBA_CMD22 P3 L2 FBA_CMD29 FBA_CMD22 P3 L2 FBA_CMD29 FBA_CMD25 FBA_CMD19 N3
FBA_DQM1 A2 CS# A2 CS# P3 A1 L2 A0
FBA_DQM2 D19 FBA_CMD24 N2 T2 FBA_CMD15 FBA_CMD24 N2 T2 FBA_CMD15 FBA_CMD4 FBA_CMD8 FBA_CMD25 P7
FBA_DQM2 A3 RESET# A3 RESET# A2 CS# A1
FBA_DQM3 D23 FBA_CMD0 P8 FBA_CMD0 P8 FBA_CMD6 N2 T2 FBA_CMD15 FBA_CMD4 P3 L2 FBA_CMD8
FBA_DQM3 A4 A4 P8 A3 RESET# A2 CS#
FBA_DQM4 T24 F24 FBA_CLK0 FBA_CMD2 P2 FBA_CMD2 P2 FBA_CMD5 FBA_CMD6 N2 T2 FBA_CMD15
FBA_DQM4 FBA_CLK0 A5 A5 P2 A4 A3 RESET#
FBA_DQM5 AA23 F23 FBA_CLK0* FBA_CMD21 R8 T7 FBA_CMD21 R8 T7 FBA_CMD13 FBA_CMD5 P8
FBA_DQM5 FBA_CLK0# A6 NC#T7 A6 NC#T7 A5 A4
FBA_DQM6 AB27 N24 FBA_CLK1 FBA_CMD16 R2 L9 FBA_CMD16 R2 L9 FBA_CMD21 R8 T7 FBA_CMD13 P2
FBA_DQM6 FBA_CLK1 A7 NC#L9 A7 NC#L9 R2 A6 NC#T7 L9 A5
FBA_DQM7 T26 N23 FBA_CLK1* FBA_CMD23 T8 L1 FBA_CMD23 T8 L1 FBA_CMD16 FBA_CMD21 R8 T7
FBA_DQM7 FBA_CLK1# A8 NC#L1 A8 NC#L1 A7 NC#L9 L1 A6 NC#T7
FBA_CMD20 R3 J9 FBA_CMD20 R3 J9 FBA_CMD23 T8 FBA_CMD16 R2 L9
A9 NC#J9 A9 NC#J9 A8 NC#L1 A7 NC#L9
FBA_CMD17 L7 J1 FBA_CMD17 L7 J1 FBA_CMD20 R3 J9 FBA_CMD23 T8 L1
A10/AP NC#J1 A10/AP NC#J1 L7 A9 NC#J9 A8 NC#L1
FBA_DQS_WP0 C25 FBA_CMD9 R7 FBA_CMD9 R7 FBA_CMD17 J1 FBA_CMD20 R3 J9
FBA_DQS_WP0 A11 A11 A10/AP NC#J1 A9 NC#J9
FBA_DQS_WP1 A19 M22 FBA_DEBUG FBA_CMD14 N7 FBA_CMD14 N7 FBA_CMD9 R7 FBA_CMD17 L7 J1
FBA_DQS_WP1 NC#M22 A12/BC# A12/BC# N7 A11 A10/AP NC#J1
FBA_DQS_WP2 E19 FBA_CMD26 T3 J8 FBA_CMD26 T3 J8 FBA_CMD14 FBA_CMD9 R7
FBA_DQS_WP2 A13 VSS TP53 A13 VSS A12/BC# A11
FBA_DQS_WP3 A24 TP52 FBA_MEM1_NC_M7 M7 M1 FBA_MEM2_NC_M7 M7 M1 FBA_CMD26 T3 J8 FBA_CMD14 N7
FBA_DQS_WP3 A15 VSS TPAD28 A15 VSS M7 A13 VSS M1 A12/BC#
FBA_DQS_WP4 T22 TPAD28 M9 M9 TP54 FBA_MEM3_NC_M7 FBA_CMD26 T3 J8
FBA_DQS_WP4 VSS VSS A15 VSS TP55 A13 VSS
FBA_DQS_WP5 AA24 (G) J2 (G) J2 TPAD28 M9 FBA_MEM4_NC_M7 M7 M1
FBA_DQS_WP5 VSS VSS VSS J2 TPAD28 A15 VSS
FBA_DQS_WP6 AA26 FBA_CMD12 M2 P9 FBA_CMD12 M2 P9 (G) M9 FBA_CLK0
FBA_DQS_WP6 BA0 VSS BA0 VSS M2 VSS P9 VSS
FBA_DQS_WP7 T27 FBA_CMD3 N8 G8 FBA_CMD3 N8 G8 FBA_CMD12
(G) J2
FBA_DQS_WP7 BA0 VSS

1
BA1 VSS M3 BA1 VSS N8 G8 VSS
FBA_CMD27 M3 B3 FBA_CMD27 B3 FBA_CMD3 FBA_CMD12 M2 P9
BA2 VSS BA2 VSS BA1 VSS BA0 VSS R891
T1 T1 FBA_CMD27 M3 B3 FBA_CMD3 N8 G8
VSS VSS BA2 VSS BA1 VSS 243R2F-2-GP
FBA_DQS_RN0 D25 A9 A9 T1 FBA_CMD27 M3 B3
FBA_DQS_RN0 VSS VSS VSS A9 BA2 VSS
FBA_DQS_RN1 A18 FBA_CLK0 J7 T9 FBA_CLK0 J7 T9 T1
FBA_DQS_RN1 CK VSS CK VSS VSS VSS
FBA_DQS_RN2 E18 FBA_CLK0* K7 E1 FBA_CLK0* K7 E1 FBA_CLK1 J7 T9 A9
FBA_DQS_RN2 CK VSS

2
B24 CK# VSS CK# VSS K7 E1 VSS
FBA_DQS_RN3 P1 P1 FBA_CLK1* FBA_CLK1 J7 T9 FBA_CLK0*
FBA_DQS_RN3 VSS VSS CK# VSS CK VSS
FBA_DQS_RN4 R22 FBA_CMD18 K9 FBA_CMD18 K9 P1 FBA_CLK1* K7 E1
FBA_DQS_RN4 CKE CKE K9 VSS CK# VSS (G)
FBA_DQS_RN5 Y24 G1 G1 FBA_CMD7 P1
FBA_DQS_RN5 VSSQ VSSQ CKE VSS
FBA_DQS_RN6 AA27 F9 F9 G1 FBA_CMD7 K9 FBA_CLK1
FBA_DQS_RN6 VSSQ VSSQ VSSQ F9 CKE
FBA_DQS_RN7 R27 FBA_DQM1 D3 E8 FBA_DQM3 D3 E8 G1
FBA_DQS_RN7 DMU VSSQ DMU VSSQ VSSQ VSSQ

1
FBVDDQ FBA_DQM2 E7 E2 FBA_DQM0 E7 E2 FBA_DQM7 D3 E8 F9
DML VSSQ DML VSSQ E7 DMU VSSQ
E2 VSSQ
D8 D8 FBA_DQM4 FBA_DQM6 D3 E8 R892
VSSQ VSSQ DML VSSQ DMU VSSQ
B15 FB_CAL_PD_VDDQ R164 1 2 40D2R2F-GP D1 D1 D8 FBA_DQM5 E7 E2 243R2F-2-GP
FB_CAL_PD_VDDQ VSSQ VSSQ VSSQ D1 DML VSSQ
FBA_CMD11 L3 B9 FBA_CMD11 L3 B9 D8
WE# VSSQ WE# VSSQ L3 VSSQ B9 VSSQ
A15 FB_CAL_PU_GND R163 1 (G) 2 40D2R2F-GP FBA_CMD10 K3 B1 FBA_CMD10 K3 B1 FBA_CMD11 D1
FB_CAL_PU_GND CAS# VSSQ CAS# VSSQ WE# VSSQ VSSQ

2
FBA_CMD1 J3 G9 FBA_CMD1 J3 G9 FBA_CMD10 K3 B1 FBA_CMD11 L3 B9 FBA_CLK1*
RAS# VSSQ RAS# VSSQ CAS# VSSQ WE# VSSQ
B16 FB_CAL_TERM_GND R156 1 (G) 2 40D2R2F-GP FBA_CMD1 J3 G9 FBA_CMD10 K3 B1
FB_CAL_TERM_GND RAS# VSSQ CAS# VSSQ
FBA_CMD1 J3 G9 (G)
RAS# VSSQ
(G)
GND
H5TQ1G63BFR-12C-GP
(G)
H5TQ1G63BFR-12C-GP
(G) H5TQ1G63BFR-12C-GP
(G) H5TQ1G63BFR-12C-GP
2009/11/16
V_1P05_CORE
(G)
PLACE AT THE
FB_PLLAVDD
R19
0.065 Amps

FB_PLLAVDD 1
L49

(G)
2
FBVDDQ (G) For EMI FBVDDQ (G)
END TERMINATION
1

A16 T19 (G) (R) R635 R637


FB_VREF FB_DLLAVDD C189 C190 HCB1608KF-181-GP FBVDDQ 1KR2F-3-GP
1KR2F-3-GP
AC19 1 2 FB_VREF_A 1 2 FB_VREF_B
2

FB_PLLAVDD
2

SC4D7U10V3KX-GP

1
1

SC4D7U10V3KX-GP (G) (G)


1
1

1
C397 R634 (G) C401 R636 (G)
SCD1U16V2ZY-2GP 1KR2F-3-GP C396 SCD1U16V2ZY-2GP 1KR2F-3-GP C398
1

1
1

GT218-ION-A3-GP (R) SCD1U16V2ZY-2GP (G) (G) (G) (G) (G) (G) (G) (G) (R) SCD1U16V2ZY-2GP
2
2

2
EC491 EC492 EC493 EC494 EC495 EC496 EC497 EC498
SC15P50V2JN-2-GP

2
SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP
2

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

GND
(G71.GT218.B0U)
2

2
2

Wistron Incorporated
PLACE CLOSE TO DIMM PLACE CLOSE TO DIMM
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Title
GPU NV GT218-ILV
Size Document Number Rev
E AIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 14 of 31


5 4 3 2 1

CLOCK 2009/11/24
2009/11/26 3D3V_S0
CK_P_33M_ICH
6 CK_P_33M_ICH
U7A 1 OF 6 RN1
CK_48M_USB_ICH 1 8 P_FRAME_N
6 CK_48M_USB_ICH
TPAD28 TP19 NC_P_PAR A5 B22 2 7 P_DEVSEL_N
CK_PE_100M_ICH_DP P_DEVSEL_N PAR AD0 P_STOP_N
6 CK_PE_100M_ICH_DP B15 D18 3 6
CK_P_33M_ICH DEVSEL# AD1 P_SERR_N
J12 C17 4 5
CK_PE_100M_ICH_DN PCIRST_N PCICLK AD2
6 CK_PE_100M_ICH_DN A23 C18
P_IRDY_N PCIRST# AD3
B7 B17 SRN8K2J-4-GP
P_PME_N IRDY# AD4
C22 C19
P_SERR_N PME# AD5
B11 B18
P_STOP_N SERR# AD6
F14 B19
P_PLOCK_N STOP# AD7 R512 1 10KR2J-3-GP P_REQ_N1
A8 D16 2
P_TRDY_N PLOCK# PCI AD8 R205 1 10KR2J-3-GP P_REQ_N2
A10 D15 2
D TRDY# AD9 D
DMI Default:H
P_PERR_N
P_FRAME_N
D10
A16
PERR# AD10
A13
E14
FRAME# AD11 CRB: PULL UP P_REQ
H14
AD12
7 DMI_MCH_IT_MR_0_DP DMI_MCH_IT_MR_0_DP STRAP2# STRAP1# AD13
L14
J14 RN2
AD14
7 DMI_MCH_IT_MR_0_DN DMI_MCH_IT_MR_0_DN LPC H H TPAD28 TP14 NC_P_GNT1 A18
GNT1# AD15
E10 1 8 P_PERR_N
TPAD28 TP17 NC_P_GNT2 E16 C11 2 7 P_TRDY_N
GNT2# AD16
7 DMI_MCH_IT_MR_1_DP DMI_MCH_IT_MR_1_DP PCI H L AD17
E12 3 6 P_PLOCK_N
P_REQ_N1 G16 B9 4 5 P_IRDY_N
REQ1# AD18
7 DMI_MCH_IT_MR_1_DN DMI_MCH_IT_MR_1_DN SPI L H P_REQ_N2 A20
REQ2# AD19
B13
L12 SRN8K2J-4-GP
DMI_MCH_IT_MR_2_DP AD20
7 DMI_MCH_IT_MR_2_DP B8
(R) R513 1 10KR2J-3-GP P_GPIO48 AD21
2 G14 A3
DMI_MCH_IT_MR_2_DN R225 1 10KR2J-3-GP P_GPIO17 GPIO48/ STRAP1# AD22
7 DMI_MCH_IT_MR_2_DN 2 A2 B5
3D3V_S0 R216 1 10KR2J-3-GP PANEL_FB GPIO17/ STRAP2# AD23
2 C15 A6
DMI_MCH_IT_MR_3_DP R520 1 10KR2J-3-GP SPK_MUTE_N GPIO22 AD24 3D3V_S0
7 DMI_MCH_IT_MR_3_DP 2 C9 G12
GPIO1 AD25
6/23 AD26
H12 RN4
7 DMI_MCH_IT_MR_3_DN DMI_MCH_IT_MR_3_DN C8 1 8 P_INTH_N
AD27 P_INTE_N
D9 2 7
P_INTA_N AD28 P_INTG_N
B2 C7 3 6
DMI_MCH_MT_IR_0_DP P_INTB_N PIRQA# AD29 P_INTD_N
D7 C1 4 5
7 DMI_MCH_MT_IR_0_DP P_INTC_N PIRQB# AD30
B3 B1
DMI_MCH_MT_IR_0_DN P_INTD_N PIRQC# AD31
H10 SRN8K2J-4-GP
7 DMI_MCH_MT_IR_0_DN P_INTE_N PIRQD#
E8
DMI_MCH_MT_IR_1_DP P_INTF_N PIRQE#/GPIO2
D6
7 DMI_MCH_MT_IR_1_DP P_INTG_N PIRQF#/GPIO3
H8 H16 RN5
DMI_MCH_MT_IR_1_DN P_INTH_N PIRQG#/GPIO4 C/BE0# P_INTB_N
F8 M15 1 8
7 DMI_MCH_MT_IR_1_DN 5V_S0 TPAD28 TP18 PIRQH#/GPIO5 C/BE1# P_INTF_N
C13 2 7
DMI_MCH_MT_IR_2_DP TP_STRAP0# C/BE2# P_INTC_N
D11 L16 3 6
7 DMI_MCH_MT_IR_2_DP R514 1 STRAP0# C/BE3#
2 10KR2J-3-GP P_RSVD_K9 K9 4 5 P_INTA_N
DMI_MCH_MT_IR_2_DN R515 1 P_RSVD_M13 RSVD#K9
2 10KR2J-3-GP M13
7 DMI_MCH_MT_IR_2_DN RSVD#M13
6/23 SRN8K2J-4-GP
DMI_MCH_MT_IR_3_DP
7 DMI_MCH_MT_IR_3_DP TIGER-GP
DMI_MCH_MT_IR_3_DN
7 DMI_MCH_MT_IR_3_DN
(71.0NM10.00U)
C 3D3V_S0 R199 1 2 10KR2J-3-GP PCIRST_N C
(R)

PCI-E R203 2
(R)
1 10KR2J-3-GP P_PME_N

PCIE_RXN_CR AC coupling caps need to be


25 PCIE_RXN_CR
PCIE_RXP_CR
25 PCIE_RXP_CR
PCIE_TXN_CR
within 250 mils of the driver.
25 PCIE_TXN_CR
PCIE_TXP_CR
25 PCIE_TXP_CR

20 PCIE_RXN_LAN PCIE_RXN_LAN U7B 2 OF 6


20 PCIE_RXP_LAN PCIE_RXP_LAN
PCIE_TXN_LAN DMI_MCH_MT_IR_0_DN R186 1 2 0R0402-PAD-1-GP DMI_ICH_MT_IR_0_DN R23 H7 USBP0-
20 PCIE_TXN_LAN PCIE_TXP_LAN DMI_MCH_MT_IR_0_DP R187 DMI_ICH_MT_IR_0_DP DMI0RXN USBP0N USBP0+
1 2 0R0402-PAD-1-GP R24 H6
20 PCIE_TXP_LAN DMI_MCH_IT_MR_0_DN C323 SCD1U10V2MX-3GP DMI_ICH_IT_MR_0_DN DMI0RXP USBP0P USBP1-
1 2 P21 H3
PCIE_RXN_MINI1 DMI_MCH_IT_MR_0_DP C324 SCD1U10V2MX-3GP DMI_ICH_IT_MR_0_DP DMI0TXN USBP1N USBP1+
24 PCIE_RXN_MINI1 1 2 P20 H2
R502 DMI0TXP USBP1P
24 PCIE_RXP_MINI1
PCIE_RXP_MINI1 DMI_MCH_MT_IR_1_DN 1 2 0R0402-PAD-1-GP DMI_ICH_MT_IR_1_DN T21 J2 USBP2-
PCIE_TXN_MINI1 DMI_MCH_MT_IR_1_DP R503 DMI_ICH_MT_IR_1_DP DMI1RXN USBP2N USBP2+
24 PCIE_TXN_MINI1 1 2 0R0402-PAD-1-GP T20 J3
PCIE_TXP_MINI1 DMI_MCH_IT_MR_1_DN C101 SCD1U10V2MX-3GP DMI_ICH_IT_MR_1_DN DMI1RXP USBP2P USBP3-
1 2 T24 K6

DMI
24 PCIE_TXP_MINI1 DMI1TXN USBP3N
DMI_MCH_IT_MR_1_DP C102 1 2 SCD1U10V2MX-3GP DMI_ICH_IT_MR_1_DP T25 K5 USBP3+
DMI_MCH_MT_IR_2_DN R499 DMI_ICH_MT_IR_2_DN DMI1TXP USBP3P USBP4-
1 2 0R0402-PAD-1-GP T19 K1
DMI_MCH_MT_IR_2_DP R498 DMI2RXN USBP4N
1 2 0R0402-PAD-1-GP DMI_ICH_MT_IR_2_DP T18 K2 USBP4+
PCIE_RXN_GPU DMI_MCH_IT_MR_2_DN C109 SCD1U10V2MX-3GP DMI_ICH_IT_MR_2_DN DMI2RXP USBP4P USBP5-
14 PCIE_RXN_GPU 1 2 U23 L2
PCIE_RXP_GPU DMI_MCH_IT_MR_2_DP C110 SCD1U10V2MX-3GP DMI_ICH_IT_MR_2_DP DMI2TXN USBP5N USBP5+
14 PCIE_RXP_GPU 1 2 U24 L3
R501 DMI2TXP USBP5P
14 PCIE_TXN_GPU
PCIE_TXN_GPU DMI_MCH_MT_IR_3_DN 1 2 0R0402-PAD-1-GP DMI_ICH_MT_IR_3_DN V21 M6 USBP6-
PCIE_TXP_GPU DMI_MCH_MT_IR_3_DP R500 DMI_ICH_MT_IR_3_DP DMI3RXN USBP6N USBP6+
14 PCIE_TXP_GPU 1 2 0R0402-PAD-1-GP V20 M5
DMI_MCH_IT_MR_3_DN C103 SCD1U10V2MX-3GP DMI_ICH_IT_MR_3_DN DMI3RXP USBP6P USBP7-
1 2 V24 N1
DMI_MCH_IT_MR_3_DP C104 SCD1U10V2MX-3GP DMI_ICH_IT_MR_3_DP DMI3TXN USBP7N USBP7+
1 2 V23 N2
DMI3TXP USBP7P

D4 -USB_OC067 1 2 3D3V_S5
PCIE_RXN_CR OC0# -USB_OC12 R237

USB
K21 C5
PCIE_RXP_CR PERN1 OC1#
K22 D3
PCIE_TXN_CR C97 SCD1U10V2MX-3GP PCIE_TXN_CR_C PERP1 OC2# -USB_OC345 10KR2J-3-GP
1 2 J23 D2
PCIE_TXP_CR C98 SCD1U10V2MX-3GP PCIE_TXP_CR_C PETN1 OC3#
1 2 J24 E5
PCIE_RXN_LAN PETP1 OC4#
M18 E6
PERN2 OC5#/GPIO29
B USB PCIE_RXP_LAN
PCIE_TXN_LAN C107 1 2 SCD1U10V2MX-3GP PCIE_TXN_LAN_C
M19
K24
PERP2 OC6#/GPIO30
C2
C3 2009/11/26 B
PCIE_TXP_LAN C108 1 SCD1U10V2MX-3GP PCIE_TXP_LAN_C PETN2 OC7#/GPIO31
2 K25
PCIE_RXN_MINI1 PETP2 R236
L23
-USB_OC12 PCIE_RXP_MINI1 PERN3 22D6R2F-L1-GP
19 -USB_OC12 L24
-USB_OC345 PCIE_TXN_MINI1 C329 1 SCD1U10V2MX-3GP PCIE_TXN_MINI1_C PERP3 USBRBIAS_ICH
19 -USB_OC345 2 L22 G2 1 2
PETN3 USBRBIAS

PCI-E
PCIE_TXP_MINI1 C330 1 2 SCD1U10V2MX-3GP PCIE_TXP_MINI1_C M21 G3
USBP0- PCIE_RXN_GPU PETP3 USBRBIAS#
19 USBP0- P17
USBP0+ PCIE_RXP_GPU PERN4
19 USBP0+ P18
USBP1- PCIE_TXN_GPU C395 1 SCD1U10V2MX-3GP PCIE_TXN_GPU_C PERP4
19 USBP1- 2 N25
USBP1+ PCIE_TXP_GPU C394 1 SCD1U10V2MX-3GP PCIE_TXP_GPU_C PETN4
19 USBP1+ 2 N24
USBP2- PETP4 CK_48M_USB_ICH
19 USBP2- F4
USBP2+ 2009/11/16 CLK48
19 USBP2+
USBP3- ADD GPU
19 USBP3-
19 USBP3+ USBP3+
19 USBP4- USBP4-
19 USBP4+ USBP4+
19 USBP5- USBP5-
19 USBP5+ USBP5+ V_1P5_CORE R507
24 USBP6- USBP6- 24D9R2F-L-GP
24 USBP6+ USBP6+ 1 2DMICOMP H24
USBP7- DMI_ZCOMP
19 USBP7- J22
USBP7+ DMI_IRCOMP
19 USBP7+
CK_PE_100M_ICH_DN W23
CK_PE_100M_ICH_DP DMI_CLKN
W24
DMI_CLKP

TIGER-GP

(71.0NM10.00U)
6/21
PANEL_FB
13,14 PANEL_FB

A A

Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Title
TIGERPOINT DMI/PCIE/USB
Size Document Number Rev
C AIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 15 of 31


5 4 3 2 1
5 4 3 2 1

CLOCK U7C 3 OF 6

6 CK_ICHSATA_DN CK_ICHSATA_DN R12 AE6 SATAHDR_RX0_DN_L C174 1 2SCD01U16V2KX-3GP SATAHDR_RX0_DN


CK_ICHSATA_DP RSVD#R12 SATA0RXN SATAHDR_RX0_DP_L C172 SATAHDR_RX0_DP
6 CK_ICHSATA_DP AE20 AD6 1 2SCD01U16V2KX-3GP
RSVD#AE20 SATA0RXP SATAHDR_TX0_DN_L C175
AD17 AC7 1 2SCD01U16V2KX-3GP SATAHDR_TX0_DN
RSVD#AD17 SATA0TXN SATAHDR_TX0_DP_L C177 SATAHDR_TX0_DP
AC15 AD7 1 2SCD01U16V2KX-3GP
RSVD#AC15 SATA0TXP SATAHDR_RX1_DN_L C211 SATAHDR_RX1_DN
AD18 AE8 1 2SCD01U16V2KX-3GP
RSVD#AD18 SATA1RXN SATAHDR_RX1_DP_L C210
Y12 AD8 1 2SCD01U16V2KX-3GP SATAHDR_RX1_DP
RSVD#Y12 SATA1RXP SATAHDR_TX1_DN_L C222 SATAHDR_TX1_DN
AA10 AD9 1 2SCD01U16V2KX-3GP
RSVD#AA10 SATA1TXN
HOST AA12
Y10
RSVD#AA12 SATA1TXP
AC9 SATAHDR_TX1_DP_L C224 1 2SCD01U16V2KX-3GP SATAHDR_TX1_DP

SATA
H_A20M_N RSVD#Y10 CAD NOTE:
AD15
9 H_A20M_N H_IGNNE_N RSVD#AD15 PLACE NEAR SATA CONN
W10
9 H_IGNNE_N H_INIT_N RSVD#W10
V12
9 H_INIT_N H_INTR RSVD#V12
AE21
D 9 H_INTR H_NMI RSVD#AE21 D
AE18
9 H_NMI H_SMI_N RSVD#AE18
AD19
9 H_SMI_N H_STPCLK_N RSVD#AD19
U12
9 H_STPCLK_N RSVD#U12 CK_ICHSATA_DN
AD4
SER_IRQ SATA_CLKN CK_ICHSATA_DP
17,22,23 SER_IRQ AC17 AC4
H_FERR_N RSVD#AC17 SATA_CLKP
9 H_FERR_N AB13
RSVD#AB13 SATARBIAS_ICH
AC13 AD11
H_THERMTRIP_N RSVD#AC13 SATARBIAS#
9 H_THERMTRIP_N AB15 AC11
RSVD#AB15 SATARBIAS
Y14 AD25
RSVD#Y14 SATALED#
AB16 2009/11/18
RSVD#AB16
AE24
RSVD#AE24
AE23
RSVD#AE23
SATA
22 SATAHDR_RX0_DN SATAHDR_RX0_DN AA14 U16 A20GATE
SATAHDR_RX0_DP RSVD#AA14 A20GATE H_A20M_N
22 SATAHDR_RX0_DP V14 Y20
SATAHDR_TX0_DN RSVD#V14 A20M# H_CPUSLP_N
Y21
22 SATAHDR_TX0_DN SATAHDR_TX0_DP CPUSLP# H_IGNNE_N 1D5V_S3 EC478 V_1P05_CORE
Y18
22 SATAHDR_TX0_DP SATAHDR_RX1_DN IGNNE# TP_INIT_3P3V TP9 TPAD28
22 SATAHDR_RX1_DN AD16 AD21
SATAHDR_RX1_DP RSVD#AD16 INIT3_3V# H_INIT_N
22 SATAHDR_RX1_DP AB11 AC25 1 2
SATAHDR_TX1_DN RSVD#AB11 INIT# H_INTR
AB10 AB24
22 SATAHDR_TX1_DN RSVD#AB10 INTR

HOST
SATAHDR_TX1_DP Y22 H_FERR_N
22 SATAHDR_TX1_DP AUTO_COLOR_SIO FERR# H_NMI SCD1U16V2ZY-2GP
AD23 T17
GPIO36 NMI KBRST_N
AC21
RCIN# SER_IRQ EC477
AA16 R209
SERIRQ H_SMI_N
AA21
SMI# SB_STPCLK_N H_STPCLK_N
V18 1 2 1 2
STPCLK# H_THERMTRIP_N
AA20
THERMTRIP#
SIO 23 A20GATE
A20GATE
0R0402-PAD-1-GP SCD1U16V2ZY-2GP
KBRST_N CAD NOTE:
23 KBRST_N PLACE NEAR TPT
2009/11/30
TIGER-GP
CROSS MOAT for HOST BUS
(71.0NM10.00U)
C C

6/21
AUTO_COLOR_SIO V_1P05_CORE
13 AUTO_COLOR_SIO
(R) CAD NOTE :
H_CPUSLP_N 1 2 V_1P05_CORE TRACES TIED TOGETHER CLOSE TO PINS
R206 1KR2J-1-GP LENGTH NO LONGER THAN 200 MIL TO RESISTOR

(R)
H_A20M_N 1 2
R204 1KR2J-1-GP
(R) SATARBIAS_ICH 1 2
H_IGNNE_N 1 2
R215 1KR2J-1-GP R219
(R) 24D9R2F-L-GP
H_INIT_N 1 2
R182 1KR2J-1-GP
(R)
H_INTR 1 2
R181 1KR2J-1-GP
(R)
H_NMI 1 2 3D3V_S0
R213 1KR2J-1-GP
(R)
H_SMI_N 1 2
R202 1KR2J-1-GP
(R)
H_STPCLK_N 1 2
R207 1KR2J-1-GP
R198
BOM NOTE: AUTO_COLOR_SIO 1 2 10KR2J-3-GP
WHEN NOT IN USED , PU WITH 1KOHM DEFENSIVE SITE

B B

A A

Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Title
TIGERPOINT HOST/SATA
Size Document Number Rev
C AIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 16 of 31


5 4 3 2 1
5 4 3 2 1

CLOCK 3D3V_S5 3D3V_S0


CK_14M_ICH
6 CK_14M_ICH

1
R1008
U7D 4 OF 6 1KR2J-1-GP
SER_RI* R176 2 1 10KR2J-3-GP TPAD28 TP45 L_DRQ1_N
AA5 T15 PANEL_DET

2
LDRQ1#/GPIO23 BM_BUSY#/GPIO0
LPC L_AD0 V6
LAD0/FWH0 GPIO6
W16 W1_DETECT_N P_GPIO15 2010/05/05

LPC
SMB_ALERT_PU R211 2 1 10KR2J-3-GP L_AD1 AA6 W14 W2_DETECT_N
LAD1/FWH1 GPIO7

1
L_AD[3..0] L_AD[3..0] L_AD2 Y5 K18 PANEL_SEL1
22,23 L_AD[3..0] L_AD3 LAD2/FWH2 GPIO8
W8 H19 PANEL_SEL2 6/21 R177
SYS_RST_N R509 L_DRQ_N LAD3/FWH3 GPIO9 PANEL_SEL3 4K7R2J-2-GP
2 1 10KR2J-3-GP Y8 M17
L_FRAME_N L_FRAME_N LDRQ0# GPIO10 P_GPIO12
22,23 L_FRAME_N Y4 A24
LFRAME# GPIO12 PME_N
C23

2
GPIO13
16,22,23 SER_IRQ
SER_IRQ AUD_LINK_BCLK P6
HDA_BIT_CLK GPIO14
P5 SIO_SMI* 2010/03/24
AUD_LINK_RST_N U2 E24 P_GPIO15

AUDIO
LPCPD_N SMLALERT_ICH R175 TP_ACZ_SDI0 HDA_RST# GPIO15 PM_DPRSLPVR
D 22 LPCPD_N 2 1 10KR2J-3-GP TPAD28 TP21 W2 AB20 D
TPAD28 TP20 TP_ACZ_SDI1 HDA_SDI0 DPRSLPVR TP_CK_PCI_STOP_N TP16 TPAD28
V2 Y16
AUD_LINK_SDI2 HDA_SDIN1 STP_PCI# TP_CPU_STOP_N TP13 TPAD28
P8 AB19
SMLINK0_ICH R178 AUD_LINK_SDO HDA_SDIN2 STP_CPU# LAN_EN_PWR
2 1 10KR2J-3-GP AA1 R3 R190
AUD_LINK_SYNC HDA_SDOUT GPIO24 TPEV_P_GPIO25
Y1 C24 1 2
CK_14M_ICH HDA_SYNC GPIO25 ISPWT_EN_N
AUDIO SMLINK1_ICH R179 2 1 10KR2J-3-GP
AA3
CLK14 GPIO26
D19
D20 TP_GPIO27
TP51
TP63
TPAD28
TPAD28 2009/11/15
0R0402-PAD
BOM NOTE :
AUD_LINK_BCLK GPIO27 PWRLED_N TP65 TPAD28 STUFF R44LB IN CRB TOENABLE TGP AC
U3 F22

EPROM
21 AUD_LINK_BCLK LPCPD_N EE_CS GPIO28 TP_TPM_CLKRUN_N COUPLED MODE
R997 2 1 10KR2J-3-GP AE2 AC19 TP12 TPAD28
AUD_LINK_RST_N 20100201 EE_DIN CLKRUN# W1_DISABLE_N
T6 U14
21 AUD_LINK_RST_N AUD_LINK_SDI2 EE_DOUT GPIO33 TP_GPIO34
21 AUD_LINK_SDI2 V3
EE_SHCLK GPIO34
AC1 TP44 TPAD28 2009/11/15
SPI_MOSI_FLASH R254 2 1 10KR2J-3-GP AC23 TOUCH_EN
GPIO38 CAMERA_EN
T4 AC24
AUD_LINK_SDO LAN_CLK GPIO39
P7
21 AUD_LINK_SDO AUD_LINK_SYNC SPI_MISO R234 ICH_LAN_RST_N LANR_STSYNC H_PWRGD
2 1 10KR2J-3-GP R201 1 2 10KR2J-3-GP B23 AB22
21 AUD_LINK_SYNC LAN_RST# CPUPWRGD/GPIO49
AA2 6/24

LAN
LAN_RST#: Pull-down w/10Koohm LAN_RXD0
LAN SPI_CS_N_FLASH R232 2 1 10KR2J-3-GP if NO USE the internal LAN
AD1
AC2
LAN_RXD1 THRM#
AB17
V16
ICH_THRM_PU_N
ICH_VRMPWRGD_R R217 1 2 0R2J-2-GP ICH_VRMPWRGD_PU
LAN_RXD2 VRMPWRGD ICH_SYNC_N (R)

MISC
W3 AC18
ICH_RSMRST_N ICH_RSMRST_N R208 1 LAN_TXD0 MCH_SYNC# ICH_PWRBTN_N
23,27 ICH_RSMRST_N 2 10KR2J-3-GP T7 E21
LAN_TXD1 PWRBTN# SER_RI*
U4 H23
LAN_EN_PWR LAN_TXD2 RI# LPCPD_N TP8 TPAD28
G22
20 LAN_EN_PWR P_GPIO12 R194 ICH_RTCX1 SUS_STAT#/LPCPD# TP_SUSCLK
2 1 10KR2J-3-GP W4 D22 TP10 TPAD28

RTC
-PCIE_WAKE ICH_RTCX2 RTCX1 SUSCLK SYS_RST_N PINEVIEW-D
20 -PCIE_WAKE V5 G18
ICH_RTCRST_PULLUP RTCX2 SYS_RESET# PLTRST_R_N PLTRST_N SIO
T5 G23
SMB_CLK_ALERT ICH_PWRBTN_N R497 RTCRST# PLTRST# -PCIE_WAKE GPU
20 SMB_CLK_ALERT 2 1 10KR2J-3-GP C25 V_3P0_BAT_VREG
SMB_DATA_ALERT SMB_ALERT_PU WAKE# ICH_INTRUDER_HDR_N V_3P0_BAT_VREG DESIGN NOTE :
20 SMB_DATA_ALERT E20 T8 2 1
SMB_CLK_ALERT SMBALERT#/GPIO11 INTRUDER# PWRGD_3V R221 1MR2J-1-GP DEFENSIVE DESIGN
H18 U10
SMBCLK PWROK

1
SMB
ISPWT_EN_N 2009/11/15 SMB_DATA_ALERT E23 AC3 ICH_RSMRST_N C105
SMLALERT_ICH SMBDATA RSMRST# ICH_INTVRMEN
S5 -> S0 H21 AD3 SC150P50V2JN-3GP

1
SMLINK0_ICH SMLALERT# INTVRMEN P_SPKR C118 (R)
F25 J16

2
ICH_RSMRST_N R473 SMLINK1_ICH SMLINK0 SPKR SCD1U16V2ZY-2GP
1 2 4K7R2J-2-GP F24
ICH_RSMRST_N SMLINK1 SLP_S3_N
23,27 ICH_RSMRST_N H20

2
SPI_MISO SLP_S3# SLP_S4_N
R2 E25
PME_N SIO_SMI* R233 SPI_MOSI SPI_MISO SLP_S4# SLP_S5_N
23 PME_N 2 1 10KR2J-3-GP T1 F21
SPI_MOSI SLP_S5#

SPI
SPI_CS_N M8 CAD NOTE :
SPI_CS# PLACE CLOSE TO TPT
23 ICH_PWRBTN_N
ICH_PWRBTN_N 2010/03/24 TPAD28 SPI_CLK P9
SPI_CLK BATLOW#
B25 ICH_BATLOW_PU
TP46 TP_SPI_ARB R4 AB23 PM_DPRSTP_N
SIO_PWRGD SPI_ARB DPRSTP# H_DPSLP_N
23 SIO_PWRGD AA18
3D3V_S0 DPSLP# TP_RSVD TP15 TPAD28
F20
PWRGD_3V RSVD#F20
7 PWRGD_3V ICH_SYNC_N R212
C 2 1 10KR2J-3-GP C
SLP_S5_N
27 SLP_S5_N SLP_S4_N TIGER-GP
8,23,28,29 SLP_S4_N SLP_S3_N L_DRQ_N (R) R220 2 1 10KR2J-3-GP
23,28,29,30 SLP_S3_N
(71.0NM10.00U)
3D3V_S0
H_DPSLP_N SER_IRQ R357 2 1 10KR2J-3-GP
9 H_DPSLP_N W1_DISABLE_N R596 2 1 10KR2J-3-GP

L_AD0 (R) R376 2 1 10KR2J-3-GP 2009/11/04


6,31 ICH_VRMPWRGD_PU ICH_VRMPWRGD_PU
Remove MPCIEx1 SLOT2
H_PWRGD L_AD1 (R) R373 2 1 10KR2J-3-GP
9 H_PWRGD
SYS_RST_N
SYS_RST_N 3D3V_S0
PLTRST_N
L_AD2 (R) R369 2 1 10KR2J-3-GP SMB_DATA/CLK_RESUME/MAIN 3D3V_S5
R224
390KR2F-GP
V_3P0_BAT_VREG
7,14,22,23 PLTRST_N 2KR2J-1-GP (63.39434.1DL)
L_AD3 (R) R535 2 1 10KR2J-3-GP SMB_DATA_ALERT R511 1 2 (84.27002.C3F) ICH_INTVRMEN 1 2 V_3P0_BAT_VREG
P_SPKR Q43
21 P_SPKR 2KR2J-1-GP BOM NOTE :
SMB_CLK_ALERT R510 1 2 SMB_DATA_MAIN 1 6 SMB_DATA_ALERT ALWAYS STUFF PULL-UP TO ENT\ABLE INTERVAL VRM
EXTERNAL VRM IS NOT SUPPORTED ON THIS DESIGN
2 5
ICH_THRM_PU_N
PNV R214 2 1 10KR2J-3-GP
2KR2J-1-GP
3D3V_S0
SMB_CLK_ALERT 3 4 SMB_CLK_MAIN
PM_DPRSTP_N SMB_DATA_MAIN R521 1 2 3D3V_S5
9 PM_DPRSTP_N ICH_VRMPWRGD_R R218 2 1 10KR2J-3-GP R193

1
2KR2J-1-GP 2N7002DW-1-GP 10KR2J-3-GP
SMB_CLK_MAIN R519 1 2 C356 ICH_BATLOW_PU 1 2
W1_DETECT_N R583 2 1 10KR2J-3-GP SCD1U10V2MX-3GP

2
SMB 2'nd 84.27002.C3F(DIODES)
DESIGN NOTE :
SMB_CLK_MAIN W2_DETECT_N R590 2 1 10KR2J-3-GP 20100115 MOBILE BATTERY STRAP
6,11,13,24 SMB_CLK_MAIN SMB_DATA_MAIN
6,11,13,24 SMB_DATA_MAIN
SMB_CLK_GPU TOUCH_EN R200 2 1 10KR2J-3-GP
14 SMB_CLK_GPU GPO, High
SMB_DATA_GPU
14 SMB_DATA_GPU
CAMERA_EN R183 2 1 10KR2J-3-GP
B B

GPIO ICH_RTCX1

(R) From SIO PWRGD ICH_RTCX2


W1_DISABLE_N SMB_DATA_MAIN R401 1 2 0R2J-2-GP SMB_DATA_GPU 10MR3J-L1-GP
24 W1_DISABLE_N SIO_PWRGD R391 1 0R0402-PAD-1-GP PWRGD_3V
2 1 R381 2
(R)
SMB_CLK_MAIN R405 1 2 0R2J-2-GP SMB_CLK_GPU

1
X3
3D3V_S5 R404 R402 1 2
470R2J-2-GP 100KR2J-1-GP
2009/11/21 (R)

1
X-32D768KHZ-27-GP 20100115

1
R361
4K7R2J-2-GP SLP_S3_PWRGD C120 C121
(R) SC15P50V3JN-GP SC12P50V3JN-GP

2
Q36
2

PANEL_DET SLP_S3_PWROK2 B MMBT3904-3-GP


13 PANEL_DET (R84.03904.L06)
C

PANEL_SEL1 1KR2J-1-GP Q35

E
13 PANEL_SEL1 PANEL_SEL2 SLP_S3_N R403 1 (R) SLP_S3_PWROK1 MMBT3904-3-GP
2 B CN3
13,14 PANEL_SEL2 PANEL_SEL3 (R84.03904.L06) 1
13 PANEL_SEL3 3D3V_S5 2
E
1

2009/11/09 C226
Pull- high on Page 13. SCD1U16V2ZY-2GP JUMP-158-3-GP
(R)
2

R263
VBAT1 1 2 VBAT2
2

1KR2J-1-GP
1

D4
BT1 BAS40C-GP
BAT-KB6615BP5L-GP
3D3V_S5
2

SPI
3

CPU
V_3P0_BAT_VREG
1

1
C131
1

PM_DPRSLPVR (72.25806.001) SC1U10V3ZY-6GP R260


7 PM_DPRSLPVR R269 C137 4K7R2J-2-GP
2

A 20KR2F-L-GP SC1U10V3ZY-6GP U9 A
2

CAD NOTE : CMOS1 SPI_CS_N R231 1 2 15R2J-GP SPI_CS_N_FLASH 1 8


2

CS# VCC
COM PLACE CAP CLOSE TO 1 SPI_MISO R230 1
R229 1
2 15R2J-GP SPI_MISO_FLASH
2 4K7R2J-2-GP SPI_WP#
2
3
SO HOLD#
7
6
SPI_HOLD#
SPI_CLK_FLASH R256 1 2 15R2J-GP SPI_CLK
TIGERPOINT ICH_RTCRST_PULLUP
3D3V_S5 WP# SCK SPI_MOSI_FLASH R255 1 SPI_MOSI
2 4 5 2 15R2J-GP
1

GND SI
3
C138
24 SER_RI* SER_RI* SC1U16V3KX-2GP MX25L8005M2C-15GGP Wistron Incorporated
2

DVD-CON3-9-GP
(21.60590.103) 21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
SMI# CR2032 with Cable 1-2 NORMAL(DEFAULT) Title
SIO_SMI* TIGERPOINT GPIO/SPI/LPC/RTC
23 SIO_SMI* 20.22048.022 2-3 CLR CMOS
23.22049.001 Size Document Number Rev
A2 AIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 17 of 31


5 4 3 2 1
5 4 3 2 1

MISC DECOUPLING U7E 5 OF 6


U7F 6 OF 6

F12 V_REF5V V_REF5V A1


VCC5REF VSS
A25
VSS
B6
VSS
VCCA3GBG VCCDMILL VCCDMI_PLL_ICH F5 V_REF5V_SUS VSS
B10
B16
VCC5REF_SUS V_REF5V_SUS VSS
B20
3D3V_S0 3D3V_S0 VSS
1 2 Y6 VCCA_SATA_PLL B24
L9 SBJ160808T-471Y-GP VCCSATAPLL VSS
V_1P5_CORE E18
VSS
1 2 1 2 AE3 V_3P0_BAT_VREG F16
C338 VCCRTC VSS
G4
VSS

1
SC1U10V3ZY-6GP C336 BOM NOTE: C111 Y25 G8
VCCDMIPLL VCCDMI_PLL_ICH VSS
(R) SCD1U16V2ZY-2GP DEFAULT : 0 OHM C106 SCD01U16V2KX-3GP H1
(78.10413.5FL) OPTIONAL : 600 OHM SC4D7U10V5ZY-3GP VSS
F6 V_1P5_CORE H4

2
(R) VCCUSBPLL VSS
1 2 H5
D
CAD NOTE: VSS D
K4
C349 PLACE NEAR TIGERPOINT PIN VCCA3GBG,H25 CAD NOTE: VSS
K8
SC1U10V3ZY-6GP PLACE NEAR TIGERPOINT PIN VCCA3GPLL,Y25 VSS
W18 V_1P05_CORE K11
(R) V_CPU_IO VSS
K19
VSS
K20
VSS
L4
VSS
CAD NOTE: SATA BG VCCSATA,VCCUSBCORE,VCCA3GP VCC1_5_1
AA8
M9
V_1P5_CORE VSS
M7
M11
C14LB,C29LB:PLACE AT WEST OF TPT 3D3V_S0 VCC1_5_2 VSS
M20 N3
V_1P5_CORE V_1P5_CORE VCC1_5_3 VSS
N22 N12
VCC1_5_4 VSS
1 2 N13
VSS
1 2 N14
3D3V_S0 C113 VSS
N23
SCD1U16V2ZY-2GP C350 (78.10520.5FL) VSS

POWER
P11
VSS

1
1 2 SC1U6D3V2ZY-GP C328 P13
C326 SC10U6D3V5KX-1GP VSS
J10 V_1P05_CORE P19
SC1U10V3ZY-6GP CAD NOTE: VCC1_05_1 VSS
1 2 K17 R14

2
PLACE NEAR PIN VCCASATABG CAD NOTE: VCC1_05_2 VSS
P15 R22
PLACE NEAR VCC1_5 C351 VCC1_05_3 VSS
1 2 V10 T2
C327 SC1U6D3V2ZY-GP VCC1_05_4 VSS
T22
SC1U10V3ZY-6GP 2010/06/27 (78.10520.5FL) VSS
V1
(78.10521.5BL) Thermal VSS
V7
VSS
1 2 VCC 3D3V_S0
VSS
V8
C337
SC1U10V3ZY-6GP
VCCAPLL VCC3_3_1
H25
AD13
VSS
V19
V22
V_1P05_CORE VCC3_3_2 VSS
(78.10521.5BL) 1 2 F10 V25
C340 VCC3_3_3 VSS
G10 W12
SC1U6D3V2KX-GP VCCA_SATA_PLL V_1P5_CORE VCC3_3_4 VSS
R10 W22
CAD NOTE: VCC3_3_5 VSS
T9 Y2
PLACE NEAR VCC3_3 VCC3_3_6 VSS
1 2 Y24
L11 SBJ160808T-471Y-GP 3D3V_S5 VSS
1 2 AB4
VSS

1
C332 F18 AB6
3D3V_S0 SC1U6D3V2KX-GP C115 C116 VCCSUS3_3_1 VSS
N4 AB7
SCD1U16V2ZY-2GP SC10U6D3V5KX-1GP VCCSUS3_3_2 VSS
K7 AB8

2
V_1P05_CORE VCCSUS3_3_3 VSS
F1 AC8
CAD NOTE: VCCSUS3_3_4 VSS
1 2 AD2
C114 SC10U10V5ZY-1GP PLACE NEAR TO PIN Y6 VSS
1 2 AD10
(R) VSS
C AD20 C
C335 VSS
AD24
SC10U6D3V5KX-1GP VSS
AE1
VSS
AE10
VSS
CAD NOTE: VCCPSUS2 VCCAUPLL VSS
AE25
C125B:PLACE AT NORTH OF TIGERPOINT CAD NOTE:
PLACE NEAR VCC V_1P5_CORE TIGER-GP
3D3V_S5
(71.0NM10.00U)

1
VCCRTC,VCC5REF,V5REF_SUS 2009/11/09
(78.10413.5FL)
VSS
G24
VCCAUBG C334 C341 C339
VSS
AE13

1
V_3P0_BAT_VREG SC10U10V5ZY-1GP F2

2
VSS

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
NEAR PIN F1
1 2

2
NEAR PIN AE3 RSVD#AE16
AE16
C117
V_REF5V SCD1U16V2ZY-2GP 1 2
(78.10413.5FL) 3D3V_S5
1 2 C362 CAD NOTE:
NEAR PIN F12 SCD1U16V2ZY-2GP PLACE NEAR TO U1LB,F18 TIGER-GP
C347 2010/06/27
(78.10413.5FL)
V_REF5V_SUS SCD1U16V2ZY-2GP Thermal DESIGN NOTE: CAD NOTE:
(71.0NM10.00U)
(78.10413.5FL) DEFENSIVE DESIGN FOR SATA PLACE NEAR TIGERPOINT PIN VCCAUPLL,U1LB,F6
1 2
NEAR PIN F5 CAD NOTE:
C119 PLACE NEAR TIGERPOINT PIN AS INDICATEDD
SCD1U16V2ZY-2GP
(78.10413.5FL)
CAD NOTE:
PLACE NEAR TIGERPOINT PIN AS INDICATEDD

VCCPUSB,VCCPSUS1
CAD NOTE: 3D3V_S5
PLACE REV5V CIRCUITRY NEAR TIGER POINT 1 2
B B

3D3V_S0 C333
SC1U10V3ZY-6GP
5V_S0
1 2
D8
1

(83.00054.I81) C360
2 1 R516 SC1U10V3ZY-6GP
10R2F-L-GP (78.10521.5BL)
3

CAD NOTE:
V_REF5V
PLACE NEAR TIGERPOINT PIN K7,N14

CAD NOTE:
PLACE REV5V CIRCUITRY NEAR TIGER POINT

3D3V_S5

5V_S5

D3
1

(83.00054.I81)
2 1 R235
10R2F-L-GP
3

V_REF5V_SUS

A A

Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Title
TIGERPOINT POWER/GND
Size Document Number Rev
C AIO eMARR 1A

Date: Monday, June 28, 2010 Sheet 18 of 31


5 4 3 2 1
USB Port 0,6,7
USB Port 7 -> WEB CAM 1

R276(R)
2

USBP7+ 0R2J-2-GP USB_L0_7+


USBP0- CAM_CN1
15 USBP0- USBP0+
15 USBP0+ 7

2
5V_S0 VCC5_CAM 1 USB_L0_7+
USBP7-
15 USBP7- USBP7+ USB_L0_7-
15 USBP7+ 2
R601 1 2 0R0805-PAD-1-GP 2010/06/09 3 VCC5_CAM
EMI issue L13 4 DMIC_CLK
(68.00201.141) 5 DMIC_DATA

1
C54 YFD2012-900S-GP-U-DUMMY 6
C46 8

SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP
DMIC_DATA

3
21 DMIC_DATA DMIC_CLK JWT-CON6-8-GP
21 DMIC_CLK USBP7- USB_L0_7- 2009/12/02
R274(R)
0R2J-2-GP
USB Port 1,2 1 2

15 USBP1-
15 USBP1+
USBP1-
USBP1+
USB Port 0 -> TOUCH PANEL
USBP2- 1 2
15 USBP2- USBP2+
15 USBP2+
R63 (R)
USBP0+ 0R2J-2-GP USB_L0_0+
-USB_OC12 TOU_CN1
15 -USB_OC12 5V_S0 1

2
VCC5_TOU Pin1
2
3 USB_L0_0+
68.2012T.201
USB Port 3,4,5 R602 1 2 0R0805-PAD-1-GP
L2
4
5
USB_L0_0-
VCC5_TOU
USBP3- (R68.2012T.201)
15 USBP3-

1
USBP3+ C255 YFD2012-900S-GP-U-DUMMY JWT-CON5-S13-GP
15 USBP3+
C250

SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP
USBP4-
15 USBP4-

3
USBP4+
15 USBP4+ USBP0- USB_L0_0-
USBP5- R58 (R)
15 USBP5- USBP5+ 0R2J-2-GP
15 USBP5+
1 2
-USB_OC345
15 -USB_OC345

2010/06/09 2010/06/09
USB Port 1,2 -> SIDE I/O EMI issue EMI issue

1 2 1 2
VCC5_USB_12
F2 (69.50014.001) R228 R418
1 2 VCC5_USB_12 USBP2+ 0R2J-2-GP USB_L0_2+ USBP1+ 0R2J-2-GP USB_L0_1+
VCC5_USB
(R) (R)
POLYSW-1D5A6V-3-GP
4

2
USB2 USB3
-USB_OC12 1 2 5 5
YFD2012-900S-GP-U-DUMMY VCC5_USB_12 1 VCC5_USB_12 1
1

1
1

R239 (68.00201.141)
R238 10KR2J-3-GP TC4 C122 L32 USB_L0_2- 2 L22 USB_L0_1- 2
SCD1U16V2ZY-2GP

15KR2J-1-GP E220U10VM-15-GP (R) USB_L0_2+ 3 (68.00201.141) USB_L0_1+ 3


2

4 YFD2012-900S-GP-U-DUMMY 4
6 6
2

2009/11/15
1

3
SKT-USB-109-GP SKT-USB-109-GP
USBP2- USB_L0_2- USBP1- USB_L0_1-
R259 R419
(22.10321.681) (22.10321.681)
0R2J-2-GP 0R2J-2-GP
1 2 2009/11/24 1 2
2009/11/26

(R) (R)

USB Port 3,4,5 -> REAR I/O 2010/06/09


EMI issue
2010/06/09 (22.10321.301)
EMI issue USB_REAR1
F3 POLYSW-2A6V-2-GP
VCC5_USB 1 2 VCC5_USB_345 1 2 1 2 1 2
12
R222 R481 R293
-USB_OC345 1 2 USBP3- 0R2J-2-GP USB_L0_3- USBP4- 0R2J-2-GP USB_L0_4- USBP5- 0R2J-2-GP USB_L0_5- 10
(R) USB5 (R) (R) 4
1
1

R270 5 8
4

1
2

2
R272 10KR2J-3-GP TC5 C129 VCC5_USB_345 1 USB_L0_4+ 3
SCD1U16V2ZY-2GP

15KR2J-1-GP E220U10VM-15-GP (R) USB_L0_5+ 7


2

YFD2012-900S-GP-U-DUMMY USB_L0_3- 2 USB_L0_4- 2


(68.00201.141) USB_L0_3+ 3 USB_L0_5- 6
2

L10 4 L31 L14 1


6 (68.00201.141) (68.00201.141) VCC5_USB_345 5

DOWN
2009/11/15 YFD2012-900S-GP-U-DUMMY YFD2012-900S-GP-U-DUMMY

UP
SKT-USB-109-GP 9
1

3
(22.10321.681) 11
USBP3+ USB_L0_3+ USBP4+ USB_L0_4+
R223 2009/11/24 R496 R289
0R2J-2-GP 0R2J-2-GP 0R2J-2-GP
USBP5+ USB_L0_5+ PWR-USB-5-GP
1 2 1 2 1 2

Default
(R) (R) (R)

Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Title
USB CONNECTOR
Size Document Number Rev
A2 AIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 19 of 31


5 4 3 2 1

V_3P3_LAN
CLOCK 2010/05/19
6 CLK_PCIE_LAN_DP CLK_PCIE_LAN_DP Change tab from up to down
6 CLK_PCIE_LAN_DN CLK_PCIE_LAN_DN

2
RJ1 R96 R134 R133 V_3P3_LAN
GND1 L4 LINK*_ACTIVITY_L 330R2J-3-GP 330R2J-3-GP 330R2J-3-GP (A)
NP1 GREEN U38
PCI-E MDI0+ R1

1
2009/11/23 LAN_EECS 1 8
PCIE_TXP_LAN MDI0- ORANGE LAN_LED_ACT LAN_EESK CS VCC
R2 L3 2 7
15 PCIE_TXP_LAN SK DC

SCD1U16V2ZY-2GP
PCIE_TXN_LAN MDI1+ R3 LAN_EEDI 3 6
15 PCIE_TXN_LAN PCIE_RXP_LAN MDI1- LAN_EEDO DI ORG
15 PCIE_RXP_LAN R4 4 5
PCIE_RXN_LAN LAN_CONN_CVT DO GND
15 PCIE_RXN_LAN R5

1
R6

1
D D
C241 MDI2+ R7 AT93C66A-10SU-GP C593
SCD1U16V2ZY-2GP MDI2- R8 L2 SPEED_100*_L

2
MDI3+ R9

2
MDI3- R10
ICH GPIO NP2
GND2 L1 SPEED_1000*_L1 R139 1 2 SPEED_1000*_L
YELLOW
LAN_EN_PWR 2009/11/24 RJ45-LED-XFOR-2-GP 0R0402-PAD-1-GP
17 LAN_EN_PWR

(22.10277.G11) V_3P3_LAN

Giga 100 10
2010/05/25
LAN
-PCIE_WAKE
CHANGE TO TAB DOWN
Link Orange Green X R958
17 -PCIE_WAKE PLTRST_LAN GPO
23 PLTRST_LAN 1 2
PCB Act Blink Blink Blink 1KR2J-1-GP

SMB_CLK_ALERT Act Link R971


17 SMB_CLK_ALERT R597 V_1P2_LAN
SMB_DATA_ALERT SMB_DATA_ALERT_R 1 2
17 SMB_DATA_ALERT
1 2 LINK*_ACTIVITY_L ASF 10KR2J-3-GP
(N)
2K49R2F-GP Mount - Non ASF

LAN_XTAL2
LAN_XTAL1
LAN_RSET
Unmount - ASF
V_3P3_LAN

GPO
2010/05/01 (R)
LAN_EESK 1 R953 2 SPEED_100*_L

0R0402-PAD
3D3V_S0 V_3P3_LAN V_3P3_LAN

48
47
46
45
44
43
42
41
40
39
38
37
U16
R658
49

AVDD33
AVDD33

AVDD10
CKXTAL2
CKXTAL1
AVDD33
DVDD10
LED0
DVDD3
RSET

GPO/SMBALERT
LED1/EESK
GND

1
LAN_CLKREQ_N 1 2

1
V_1P2_LAN R938 10KR2J-3-GP
C V_3P3_LAN_REG R406 0R2J-2-GP C
1KR2J-1-GP -PCIE_WAKE R660 1 (R) 2 10KR2J-3-GP 3D3V_S5
MDI0+ 1 36 LAN_REGOUT

2
MDI0- MDIP0 REGOUT AVDD33_REG
2 35

2
MDIN0 VDDREG AVDD33_REG RTL_ISOLATE_N LAN_ENSWREG -PCIE_WAKE R188 2
3 34 1 10KR2J-3-GP
MDI1+ AVDD10 VDDREG LAN_ENSWREG 2010/05/11
4 33
MDIP1 ENSWREG

1
MDI1- 5 32 LAN_EEDI (R)
MDIN1 EEDI/SDA LAN_EEDO
6 31 1 R954 2 0R0402-PAD SPEED_1000*_L R588 R659 R661
MDI2+ AVDD10 LED3/EEDO LAN_EECS LAN_EECS
7 30 15KR2J-1-GP 0R2J-2-GP 1 2
MDI2- MDIP2 EECS/SCL 10KR2J-3-GP
8 29 V_1P2_LAN (R)
MDIN2 DVDD10 -PCIE_WAKE
9 28

2
MDI3+ AVDD10 LANWAKE# R941
10 27 V_3P3_LAN
MDI3- MDIP3 DVDD33 RTL_ISOLATE_N LAN_EEDI
11 26 1 2
MDIN3 ISOLATE# PLTRST_LAN 10KR2J-3-GP
V_3P3_LAN 12 25
AVDD33 PERST#
2010/05/01
REFCLK_N
REFCLK_P
SMBDATA
CLKREQ#
SMBCLK
DVDD10

EVDD10

HSON
HSOP
HSIN
HSIP

GND
RTL8111E-GR-GP
13
14
15
16
17
18
19
20
21
22
23
24

V_1P2_LAN (71.08111.I03) V_3P3_LAN_REG


V_3P3_LAN
R937
1 2

1
1

1
LAN_CLKREQ_N

0R2J-2-GP

1
1
C317 C318 C319 C320 C88 C112
LAN_EVDD10

ASF (A) LAN_XTAL1 C216 C208

2
2

2
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
R948 0R2J-2-GP

SC4D7U6D3V3KX-GP

2
2

SCD1U16V2ZY-2GP
R948/R950 SMB_CLK_ALERT 1 2SMB_CLK_ALERT_R
Mount - ASF
SMB_DATA_ALERT 1 2SMB_DATA_ALERT_R X2
Unmount - Non-ASF R950 LAN_XTAL2
1 2
(A) 0R2J-2-GP
XTAL-25MHZ-57GP

1
B B

1
PCIE_TXP_LAN C91
PCIE_TXN_LAN SC27P50V2JN-2-GP C316
CLK_PCIE_LAN_DP 2 SC33P50V2JN-3GP

2
CLK_PCIE_LAN_DN (78.27034.1FL)

C206 201005/01
PCIE_RXP_LAN 1 2 SCD1U10V2MX-3GP PCIE_RXP_LAN_C COIL-4D7UH-16-GP V_1P2_LAN
L57
PCIE_RXN_LAN 1 2 SCD1U10V2MX-3GP PCIE_RXN_LAN_C Close To U41 Pin 3, 6, 9, 13, 29, 41, 45.
C203
LAN_REGOUT 1 2

1
1

1
C312 C254 C580 C581 C582 C583 C594

1
C182 C214

2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
SCD1U10V2MX-3GP
SC4D7U6D3V3KX-GP
2

2
3D3V_S5 AO3419 PMOS 3.5A
DC_19V

3D3V_S5
3D3V_S5
R942
1
2

R962 R959 1 2 LAN_EVDD10


2010/05/06 10KR2J-3-GP 100KR2J-1-GP
TP70
1

1
(R)
TPAD28 R957 0R2J-2-GP C315 C307
2
1

100KR2J-1-GP
S

SC1U10V3ZY-6GP
SCD1U16V2ZY-2GP
Q107
2

LAN_EN_2 1 2LAN_EN_3 G AO3419L-GP


R961
C

100R2J-2-GP C584
LAN_EN_PWR 1 2 LAN_EN_1 B Q105 R972 R960 (84.02130.031)
D

A MMBT3904-3-GP (63.10234.1DL) 100KR2J-1-GP A


SCD1U10V2MX-3GP
2

10KR2J-3-GP (R) Close To U41 Pin 21.


E
1

(R)
2

C354 (84.2N702.D31)
SC1U10V3ZY-6GP V_3P3_LAN
2

2010/05/06
R972 chagne to 1K 2010/05/10
rising time is 2mS For NMOS solution
84.03418.031 Wistron Incorporated
84.00359.C31 21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Title
RTL 8111E
Size Document Number Rev
C AIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 20 of 31


5 4 3 2 1
5 4 3 2 1

R151
1 2 5VA_S0 5V_S0
AUD_LINK_BCLK

MIC_VREFR

MIC_VREFL
17 AUD_LINK_BCLK R150
AUD_LINK_SDI2 L48
17 AUD_LINK_SDI2 AUD_LINK_SYNC 0R0603-PAD-1-GP AGND
17 AUD_LINK_SYNC 1 2 1 2
17 AUD_LINK_RST_N AUD_LINK_RST_N FCM1608KFG-301T05-GP
17 AUD_LINK_SDO AUD_LINK_SDO (R)
0R0603-PAD-1-GP AGND
1 R1007 2

2
5V_S5 2010/04/30
P_SPKR 0R0402-PAD L50 De-pop noise R340 R326
17 P_SPKR
AGND 1 2 4K7R2J-2-GP 4K7R2J-2-GP
FCM1608KFG-301T05-GP
R152 R153

1
1 2 1 2 MIC_JK1
D D
DMIC_DATA R773 SHIELDING
19 DMIC_DATA
19 DMIC_CLK DMIC_CLK 1KR2J-1-GP L41 1
0R0603-PAD-1-GP AGND 0R0603-PAD-1-GP AGND FM_L_CODEC C562 1 FM_L_CODEC_1 FM_L_CODEC_I MIC_IN_L_JK
2 1 2 1 2 2
FCM1608KFG-301T05-GP 6
SC10U6D3V5KX-1GP MIC_IN_R_JK 3
JD_MIC 4
FM_R_CODEC C563 1 2 FM_R_CODEC_1 1 2 FM_R_CODEC_I 1 2
FCM1608KFG-301T05-GP 5
SC10U6D3V5KX-1GP R774 L47
1KR2J-1-GP NP1

1
AGND C560 C561 NP2
SC100P50V2JN-3GP SC100P50V2JN-3GP

SC2D2U10V3KX-1GP
F_HPO_R AGND AUDIO-JK158-GP

2
F_HPO_L

MIC_VREFL SC10U10V5ZY-1GP

1
MIC_VREFR C230
C198 ADU_LDO_CAP 1 2 AGND AGND

2
C199 , C198 C237 SCD1U16V2ZY-2GP
closed to codec AUD_VREF 1 2 AGND HP_JK1
SHIELDING

AUD_CPVEE
L45 1
2009/12/28 closed to codec F_HPO_L 1 R348 2 F_HPO_L_1 1 2 HP_OUT_L_CON 2
5VA_S0 5VA_S0 75R2J-1-GP FCM1608KFG-301T05-GP 6
C199 AGND F_HPO_R 1 R379 2 F_HPO_R_1 1 2 HP_OUT_R_CON 3
SC2D2U10V3KX-1GP 75R2J-1-GP FCM1608KFG-301T05-GP JD_HP 4
2 1AUD_CBN L38
1

C207 C204 5

1
SC10U10V5ZY-1GP SCD1U16V2ZY-2GP AUD_CBP C197 C238
SCD1U16V2ZY-2GP NP1
2

NP2

36
35
34
33
32
31
30
29
28
27
26
25

2
U18 SC10U10V5ZY-1GP C192 C188

1
1
AGND AUDIO-JK156-GP

HPOUT-L/PORT-I-L
CBN

HPOUT-R/PORT-I-R

MIC1-VREFO-L

AVSS1
AVDD1
MIC1-VREFO-R

VREF
MIC2-VREFO
CBP

CPVEE

LDO-CAP
AGND SC100P50V2JN-3GP SC100P50V2JN-3GP
C 5V_S0 2010/01/17 C

2
2
AGND AGND

L40 SC10U10V5ZY-1GP SCD1U16V2ZY-2GP


1 2 AUD_PVDD_1 37 24 LINE1_R
AVSS2 LINE1-R/PORT-C-R
1

C213 C215 FCM1608KFG-301T05-GP C227 C234 38 23 LINE1_L


AVDD2 LINE1-L/PORT-C-L FM_R_CODEC
SCD1U16V2ZY-2GP 39 22
SPKR_L+ PVDD1 MIC1-R/PORT-B-R FM_L_CODEC
40 21
2

SPKR_L- SPK-OUT-L+ MIC1-L/PORT-B-L R368 20KR2F-L-GP AGND


41 20

LINE1_L_1

LINE1_L_2
SC10U10V5ZY-1GP SPK-OUT-L- MONO-OUT JDREF_1
42 19 1 2 AGND
PVSS1 JDREF 2010/06/09
43 18
PVSS2 SENSE_B For 33Mhz TPM EMI issue
SPKR_R- 44
SPK-OUT-R- MIC2-R/PORT-F-R
17 closed to codec
SPKR_R+ 45 16 LINEOUT_JK1
5V_S0 SPK-OUT-R+ MIC2-L/PORT-F-L E100U16VM-25-GP (68.00335.091) SHIELDING
46 15
EC_MUTE# PVDD2 LINE2-R/PORT-E-R
47 14 R3661 2 39K2R2F-L-GP JD_HP (09.1071D.G8L) L43 1
GPIO0/DMIC-DATA

EAPD LINE2-L/PORT-E-L
GPIO1/DMIC-CLK
SC10U10V5ZY-1GP 48 13 SENSE_A R3651 2 20KR2F-L-GP JD_MIC LINE1_L 1 2 1 R586 2 1 2 LIN1_L_CON 2
L42 SPDIFO SENSE_A TC17 75R2J-1-GP FCM1608KFG-301T05-GP
49 6
2009/11/25 GND R3251
2 AUD_PVDD_2 2 10KR2F-2-GP JD_LINE1 LINE1_R 1 R606 LIN1_R_CON
SDATA-OUT
1 1 2 2 1 2 3
1

1
1

C217 C218 FCM1608KFG-301T05-GP C219 TC16 75R2J-1-GP FCM1608KFG-301T05-GP JD_LINE1


SDATA-IN
4
DVDD-IO
1

PCBEEP
RESET#
SCD1U16V2ZY-2GP C223 E100U16VM-25-GP L46
DVSS2
DVDD

SYNC
P_SPKR_P1 R367 2 P_SPKR (09.1071D.G8L) (68.00335.091) C408
BCLK

SCD1U16V2ZY-2GP 1 5
2

2
2

PD#

1
1
SC100P50V2JN-3GP
SC10U10V5ZY-1GP C410

LINE1_R_1

LINE1_R_2
2

2
SC100P50V2JN-3GP SC100P50V2JN-3GP NP1
47KR2J-2-GP

1
ALC269Q-VB2-GR-GP NP2
1
2
3

8
9
10
11
12
4
5
6
7

2
2
(71.00269.E03) SC1U16V3KX-2GP C248 C225 R412
P_SPKR_P2 2 1 4K7R2J-2-GP AUDIO-JK156-GP

2
L44 AGND

1
3D3V_S0 1 2 AUD_DVDD_1
FCM1608KFG-301T05-GP
1

C243 C236
SCD1U16V2ZY-2GP
DVDD-IO R410 1 2 0R0402-PAD-1-GP 3D3V_S0 AGND
2

SC10U10V5ZY-1GP 1
1

C246 C239
SCD1U16V2ZY-2GP
2
2

B B
DMIC_DATA SC10U10V5ZY-1GP IN_SPK1
ACZ_SDIN2_C

2010/04/30 DMIC_CLK 1
de-pop noise SPKR_L- L21 HCB1608KF-330-GP (68.00217.351) SPKR_L-_C
AZ_BLCK_1

1 2
3D3V_S5 AUD_LINK_RST_N SPKR_L+ L20 1 2 HCB1608KF-330-GP (68.00217.351) SPKR_L+_C 2
SPKR_R- L19 1 2 HCB1608KF-330-GP (68.00217.351) SPKR_R-_C 3
AUD_LINK_SYNC SPKR_R+ L18 1 2 HCB1608KF-330-GP (68.00217.351) SPKR_R+_C 4

1
1

1
1
2 R392 1 AUD_LINK_SDI2 EC490 EC487 EC488 EC489 JWT-CON4-S8-GP
2

33R2J-2-GP SC100P50V2JN-3GP SC100P50V2JN-3GP

2
2

2
R364 R420 SC100P50V2JN-3GP SC100P50V2JN-3GP
1KR2J-1-GP 1KR2J-1-GP 2 R386 1 AUD_LINK_BCLK
33R2J-2-GP
PD# AUD_LINK_SDO
1

3 1

PD 1 Q52 2010/01/17
PMBS3904-1-GP AGND AGND RESERVED FOR EMI
(84.03904.L06)
2

R362
3

EC_MUTE# 2 1 EC_MUTE#1 1 Q53


PMBS3904-1-GP
(84.03904.L06)
2

10KR2J-3-GP
PD_N1

R363
3

AUD_LINK_RST_N 2 1 AUD_LINK_RST_N1 1 Q54


PMBS3904-1-GP
(84.03904.L06)
2

10KR2J-3-GP

A A

Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Title
AUDIO CODEC ALC269
Size Document Number Rev
C AIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 21 of 31


5 4 3 2 1
CLOCK Debug Port
2010/06/10 (21.62733.207)
TPM Header ( v MARR ) EMI issue
DEBUGH1
CLK_33_DBP_R 1 2 V_3P3_DBP R382 2 1 4K7R2J-2-GP 3D3V_S0
L_AD[3..0]
PLTRST_DEBUG_N 3 4
3D3V_S5 3D3V_S0 3D3V_S0
L_AD0 5 6
L_AD1 7 8 5V_S0
L_AD2 9 10
2010/04/02 X
(V) L_AD3 11 12
TPM_CN1 L_FRAME_N 13 14
PNV H_BPM_N0
CLK_33_DBP
L_FRAME_N
19
17 X
20
18
9 H_BPM_N0
H_BPM_N1 PLTRST_N 15 16
9 H_BPM_N1
H_BPM_N2 L_AD3 13 14 L_AD2 DVD-CONN14D-SFP5-GP
9 H_BPM_N2
H_BPM_N3 11 12 L_AD1
9 H_BPM_N3
L_AD0 9 10
H_BPM_2_N0 7 8
9 H_BPM_2_N0
H_BPM_2_N1 5 6 SER_IRQ
9 H_BPM_2_N1
H_BPM_2_N2 3 4 CLK_RUN_N
9 H_BPM_2_N2
H_BPM_2_N3
9 H_BPM_2_N3
LPCPD_N 2 1 LPCPD_N_1 1 2

1
XDP_TESTIN_N 33R2J-2-GP JWT-CONN20D-FP-GP (V)
9 XDP_TESTIN_N
R982 R983
9 H_TDI
H_TDI
H_TDO
(V) 10KR2J-3-GP XDP CORE#2 Debug Port
9 H_TDO H_TMS

2
9 H_TMS H_TCK
9 H_TCK H_BPM_2_N0 H_BPM_N0
1 (R) 2
H_BPM4_PRDY_N R22 0R2J-2-GP
9 H_BPM4_PRDY_N H_BPM5_PREQ_N H_BPM_2_N1 H_BPM_N1
1 (R) 2
9 H_BPM5_PREQ_N
R26 0R2J-2-GP
H_TRST_N H_BPM_2_N2 1 (R) 2 H_BPM_N2
9 H_TRST_N R25 0R2J-2-GP
H_BPM_2_N3 1 (R) 2 H_BPM_N3
R40 0R2J-2-GP

DESIGN NOTE: DEFENSIVE DESIGN

MISC
H_PWRGD
9,17 H_PWRGD
PLTRST_N
7,14,17,23 PLTRST_N
SYS_RST_N
17 SYS_RST_N
PLTRST_DEBUG_N
23 PLTRST_DEBUG_N

SATA XDP-SSA SATA0 for HDD


16 SATAHDR_TX1_DP
16 SATAHDR_TX1_DN
SATAHDR_TX1_DP
SATAHDR_TX1_DN 20.F1255.031
SATAHDR_RX1_DN
16 SATAHDR_RX1_DN SATAHDR_RX1_DP
16 SATAHDR_RX1_DP XDP_TESTIN_N H_BPM_N0
SATAHDR_TX0_DP CK_100M_XDP_DP H_BPM_N1
16 SATAHDR_TX0_DP
SATAHDR_TX0_DN CK_100M_XDP_DN H_BPM_N2
16 SATAHDR_TX0_DN
H_BPM_N3
SATA0
Layout: Put them together
SATAHDR_RX0_DN H_BPM4_PRDY_N P1 16
16 SATAHDR_RX0_DN V_3_3_HDD V33 16 5V_S0
SATAHDR_RX0_DP H_TDI TP11 TPAD28 H_BPM5_PREQ_N P2 17
16 SATAHDR_RX0_DP H_TDO TP22 TPAD28 V33 17 (R) V_5HDD V_5HDD
P3
H_TMS TP50 TPAD28 V33
NP1 F4
TP67TPAD28 SYS_RST_N NP1 V_5HDD
V_5HDD P7 NP2 1 2
H_TRST_N V5 NP2
P8

1
H_TCK TP66 TPAD28 XDP_RST_N V5
P9 POLYSW-3A6V-GP-U
20100119 V5
GULE LOGIC XDP_PWRGD P13 S1 R301 1 2
C160
SC10U10V5ZY-1GP

2
V12 GND
P14 S4
SMB_CLK_MAIN CK_H_XDP_DP V12 GND 0R0805-PAD-1-GP
6,11,13,17,24 SMB_CLK_MAIN P15 S7
SMB_DATA_MAIN CK_H_XDP_DN V12 GND
6,11,13,17,24 SMB_DATA_MAIN P4
GND R302 1
P5 2
SATAHDR_TX0_DP GND
S2 P6
SMB_CLK_MAIN 2009/11/19 SATAHDR_TX0_DN A+ GND 0R0805-PAD-1-GP
S3 P10
SMB_DATA_MAIN A- GND
P12
SATAHDR_RX0_DP GND
S6
V_1P05_CORE SATAHDR_RX0_DN B+
S5 P11
B- DAS/DSS 3D3V_S0 V_3_3_HDD
CLOCK
2010/04/02 RR337
SKT-SATA7P-15P-44-GP (R)
CLK_33_DBP 1 2
6 CLK_33_DBP

0R5J-6-GP

LPC V_1P05_CORE
2009/11/29
L_AD[3..0] 1 2 H_TRST_N 1 2
17,23 L_AD[3..0]
R446 (R) 1KR2J-1-GP R447 51R2J-2-GP
L_FRAME_N
17,23 L_FRAME_N
LPCPD_N 1 2 XDP_TESTIN_N
17 LPCPD_N R433 51R2J-2-GP
SER_IRQ
16,17,23 SER_IRQ
1 2 H_TDO
R452 51R2J-2-GP

1 2 H_TDI
R440 51R2J-2-GP
SATA1 for ODD
1
R437
2 H_TMS
51R2J-2-GP
2009/11/10 ODD SATA POWER CONNECTOR
V_5HDD
H_TCK 5V_S5 2010/04/02
1
R439
2
51R2J-2-GP ODDPWR1
Front View
1 V_5HDD

1
1
SKT-SATA7P-19-GP-U C159 (R) C158
9 2 SC10U10V5ZY-1GP SC1U16V3KX-2GP
7

2
2
SATAHDR_TX1_DP 6 JWT-CON2-S4-GP
SATAHDR_TX1_DN 5
V_1P05_CORE V_1P05_CORE 4 Pin1(GND)
SATAHDR_RX1_DN 3
SATAHDR_RX1_DP 2 20.60341.104: 4pin right angle
1 2 H_BPM_N0 1 2 H_BPM_2_N0
R9 51R2J-2-GP R10 51R2J-2-GP 1 20.60334.103: 3pin right angle
8

1 2 H_BPM_N1 1 2 H_BPM_2_N1 SATA1


R15 51R2J-2-GP R14 51R2J-2-GP

1 2 H_BPM_N2 1 2 H_BPM_2_N2
R12 51R2J-2-GP R13 51R2J-2-GP

1 2 H_BPM_N3
R34 51R2J-2-GP 1 2 H_BPM_2_N3
R33 51R2J-2-GP

1 2 H_BPM4_PRDY_N
R476 51R2J-2-GP

Wistron Incorporated
1 2 H_BPM5_PREQ_N 21F, 88, Sec.1,Hsin Tai Wu Rd
R477 51R2J-2-GP
Hsichih, Taipei Hsien
CAD NOTE: PLACE BPM TERMINATION NEAR CPU Title
HDD /ODD / KeyBoard
Size Document Number Rev
A2 AIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 22 of 31


5 4 3 2 1

V_19_3_5V
3D3V_S5
Clock R146 1 2 4K7R2F-GP PWRGD_PS_L1
PWRGD_PS_L2
SuperIO power monitoring inputs

1
6 CK_33M_SIO CK_33M_SIO

D
2010/06/11 R632 (63.47234.1DL) 5V_S0

D
CK_48M_SIO Power off sequence 100KR2J-1-GP Q61 11KR2F-L-GP
6 CK_48M_SIO 3D3V_S0
Q60 2N7002-11-GP 1 R599 2 SIO_VIN6
2N7002-11-GP R474
LPC G (84.2N702.D31) R393

2
PWRGD_PS_L G (84.2N702.D31) 2 1 ATXPG 1 2
L_AD[3..0] 10KR2F-2-GP R595 C309
17,22 L_AD[3..0]

S
1

2
0R0402-PAD-1-GP 14KR2F-GP SCD1U16V2ZY-2GP

1
S
17,22 L_FRAME_N L_FRAME_N R1009 C419 (63.10334.1DL)
20KR3J-1-GP SCD1U16V2ZY-2GP

2
PME_N (R)
17 PME_N

2
SIO_GND SIO_GND
V_1P5_CORE
3D3V_S0 3D3V_S5
D MISC L27 Reserved G16
D

7,14,17,22 PLTRST_N PLTRST_N SIO_VIN6 1 2 SIO_AVCC3 1 2 HM_V_1P5 1 2 SIO_VIN2

2
17,28,29,30 SLP_S3_N SLP_S3_N FCM1608KFG-301T05-GP

2
8,17,28,29 SLP_S4_N SLP_S4_N R1000 GAP-CLOSE-PWR R605

D
2

2
R1001 C180 C403 4K7R2J-2-GP 1KR2J-1-GP C405

SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
PLTRST_DEBUG_N 0R0402-PAD-1-GP Q38 (R) SCD1U16V2ZY-2GP

1
22 PLTRST_DEBUG_N 2N7002-11-GP
(R)

1
1
ICH_RSMRST_N (R84.2N702.D31) G PSON#

2
17,27 ICH_RSMRST_N V_1P05_CORE V_3D3V_ALW
SIO_GND SIO_GND

S
(R) V_1P05_CORE SIO_GND

1
Close to chip
TPT R143 R155 AVCC3_PD
330R2J-3-GP
2 R121 1 G14 R598

D
KBRST_N 2K2R2J-2-GP 10KR2J-3-GP 1 2 HM_V_1P05 1 2 SIO_VIN5
16 KBRST_N A20GATE (63.24234.1DL) Q11 R329
16 A20GATE C404

2
2N7002-11-GP 0R0603-PAD GAP-CLOSE-PWR 51R2F-2-GP
2

2
SIO_PWRGD PWRGD_2 G (84.2N702.D31) 2 1 SIO_GND 1 2 C406
17 SIO_PWRGD
SCD1U16V2ZY-2GP

1
SC1U16V3ZY-GP

HWM_REF
S

SIO_VIN6

SIO_VIN0
SIO_VIN5
SIO_VIN2
PWRGD_1 B (78.10593.4BL)

COM_Rl1#
COM_DCD*1
COM_DTR*1
COM_RXD1
COM_TXD1
COM_DSR*1
COM_RTS*1
1

ATXPG
HOST Q25
C183
SCD1U10V2MX-3GP CPU_THERMDA
SIO_GND VCORE SIO_GND

E
SER_IRQ MMBT3904-3-GP (R)
16,17,22 SER_IRQ

2
(84.03904.L06) G13 R495
1 2 HM_V_CPU 1 2 SIO_VIN0

64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
U29

2
GAP-CLOSE-PWR 10KR2F-2-GP

RI1#
DCD1#
DTR1#
SIN1
SOUT1
DSR1#
RTS1#

AVCC3

ATXPG/VIN3
VIN4
VIN5
VIN6

TMPIN1
GNDD

VIN1/VCC

VREF
C399
SCD1U16V2ZY-2GP

1
3D3V_S0 3D3V_S5 3D3V_S5

SCD1U16V2ZY-2GP
GULE LOGIC R353
1
R380
COM_CTS*1 1
2
CTS1# TMPIN2
48
47
SYS_TEMP_SB
CPU_THERMDC
SIO_GND
3VSB TSD-

1
ICH_PWRBTN_N C212 CPU_FANTACH1 3 46
4K7R2J-2-GP

4K7R2J-2-GP
17 ICH_PWRBTN_N FAN_TAC1 GNDA SIO_GND
CPU_FANCTL1 4 45 ICH_RSMRST_N_R R390 1 2 0R0402-PAD-1-GP ICH_RSMRST_N 2009/11/30
PWRBTN_N_OUT FAN_CTL1 RSMRST#/CIRRX1/GP55 PLTRST_CR R642 1 0R0402-PAD-1-GP PLTRST_DEBUG_N 3D3V_S0
27 PWRBTN_N_OUT 1 5 44 2

2
FAN_TAC2/GP52 PCIRST3#/GP10 SIO_MCLK KBRST_N R335 1 3D3V_S5
6 43 2 1KR2J-1-GP
2

SIO_SUSLED_N FAN_CTL2/GP51 MCLK/GP56 SIO_MDAT A20GATE R336 1 2 1KR2J-1-GP


C
27 SIO_SUSLED_N R643 5VSB_CTRL
7
8
GNDD
5VSB_CTRL
64-LQFP MDAT/GP57
KCLK/GP60
42
41 SIO_KCLK SIO_PWRGD R384 1 2 4K7R2J-2-GP
2009/11/27
C

17 SIO_SMI*
SIO_SMI* 0R0402-PAD-1-GP 2010/03/24 OBR 9
GP21 KDAT/GP61
40 SIO_KDAT R396
PLTRST_MPE 1 2 SIO_SMI* 10 39 SIO_SUSLED_N 0R2J-2-GP
GP20 3VSBSW#/GP40

PCHSM_C/PECI/AMDTSI_C
PLTRST_LAN 1 2 CIRTX 11 38 SIO_PWRGD 1 2 PME_N R387 1 2 4K7R2J-2-GP
0R0402-PAD-1-GP PLTRST_Device CIRTX1 PWRGD3_150MS SLP_S4_N (R)
12 37
R648 PCIRST2#/GP11 SUSC#/GP53 PSON# 3D3V_S0

PCHSM_D/AMDTSI_D
3D3V_S5 13 36
3VSB PSON#/GP42
COM PORT VIDVCC
PLTRST_N
14
15
VCORE PANSHW#/GP43
35
34 PME_N
PWRBTN_N_OUT
COM_RTS*1 R398 1 2 10KR2J-3-GP
SER_IRQ LRESET PME#/GP54 ICH_PWRBTN_N COM_TXD1 R482 10KR2J-3-GP
16 33 1 2
SERIRQ PWRON#/GP44 COM_DTR*1 R339 10KR2J-3-GP
1 2

SYS_3VSB
COM_Rl1# COM_Rl1# R492 1 2 10KR2J-3-GP

LFRAME#
24 COM_Rl1#
2
1

COM_DCD*1 C229 C232 SER_IRQ R493 10KR2J-3-GP

PCICLK
1 2

SUSB#
KRST#
24 COM_DCD*1

CLKIN
GNDD

VBAT
COM_DSR*1 C194

3VSB
GA20
LAD0
LAD1
LAD2
LAD3
24 COM_DSR*1
SCD1U16V2ZY-2GP

COM_DTR*1 SCD1U16V2ZY-2GP PLTRST_MPE R337 1 (R) 2 1KR2J-1-GP


SCD022U16V2KX-3GP

24 COM_DTR*1
1
2

COM_CTS*1 PLTRST_LAN R338 1 (R) 2 1KR2J-1-GP 2009/11/30


24 COM_CTS*1 (R)
COM_RTS*1 IT8758E-GP PLTRST_CR R377 1 (R) 2 1KR2J-1-GP
24 COM_RTS*1

17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
COM_RXD1
24 COM_RXD1
COM_TXD1
24 COM_TXD1
SYSTEM SENSING CIRCUIT
SLP_S3_N PLACE ON TOP SIDE
100R2J-2-GP
L_AD[3..0] L_FRAME_N 1 R142 2 HWM_REF
3D3V_S5
L_AD0

2
2
L_AD1 SIO_BAT V_3P0_BAT_VREG
L_AD2 R630 R631

1
PLTRST_MPE L_AD3 C400 CPU SENSING CIRCUIT 10KR2F-2-GP 10KR2F-2-GP
24 PLTRST_MPE PLTRST_CR KBRST_N SC1U10V3ZY-6GP (R)
25 PLTRST_CR PLTRST_LAN A20GATE

1
2

1
20 PLTRST_LAN CK_33M_SIO CPU_THERMDA SYS_TEMP_GPU SYS_TEMP_SB
CK_48M_SIO

1
1
1
9 CPU_THERMDA CPU_THERMDA

1
1
CPU_THERMDC C184 Close to chip RT1 RT2
9 CPU_THERMDC 3D3V_S5
SC2200P50V2KX-2GP (R) C361 NTC-10K-19-GP C393 NTC-10K-19-GP

2
1

2
C220 CPU_THERMDC (R)

2
2
SCD1U16V2ZY-2GP C418

2
2
SC10U10V5ZY-1GP
2

B
1 B
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP

SIO_GND

VCC5_USB_12
3D3V_S5 R604
F5 (R69.50007.B91)

OBR VCC5_USB 1 2 KBMS_PWR 1 2


2

1
POLYSW-1D5A6V-3-GP
R45 C82 (R) 0R0805-PAD-1-GP
4K7R2J-2-GP SCD1U16V2ZY-2GP

2
8
7
6
5
(V) 2009/11/12
RN3 MS1
1

2010/05/01 R52 (V) BTN3 (V) SRN8K2J-1-GP 8


OBR 1 2 OBR_R 1 2 6 4
33R2J-2-GP (68.00335.091) 2

1
3 4 L36 7

1
2
3
4
1

C29 SW-TACT-48-GP SIO_MDAT MS_DATA_R C81


FAN POWER SCD1U16V2ZY-2GP
1 2
FCM1608KFG-301T05-GP MS_CLK_R
1
5 3 SC1KP50V2KX-1GP

2
(V) 9
2

L35

1
SIO_MCLK 1 2 MINDIN6-34-GP

SC47P50V2JN-3GP

SC47P50V2JN-3GP
FCM1608KFG-301T05-GP C93 C94 GREEN
(68.00335.091) (22.10299.051)

2
R130 1 2 0R0805-PAD-1-GP
3D3V_S0 VCC5_FAN KB1
5V_S0 VCC5_FAN 8
2009/11/09 6 4
1

1 2 2
F1 R128 CPUFAN1 L37 7
POLYSW-1D5A6V-3-GP 4K7R2J-2-GP 1 5V_S0 SIO_KDAT 1 2 KB_DATA_R 1
A (R) FCM1608KFG-301T05-GP KB_CLK_R 5 3 A
2 9
2

100R2J-2-GP 3 L34 (68.00335.091)


1

1
1
VCC5_FAN CPU_FANCTL1 1 R129 2 CPU_FANCTL1_CONN 4 SIO_KCLK 1 2 MINDIN6-35-GP

SC47P50V2JN-3GP
SC47P50V2JN-3GP
R119 FCM1608KFG-301T05-GP C99 C100 PURPLE
JWT-CON4-S10-GP 1KR2J-1-GP (22.10299.061)

2
2
(68.00335.091)
1
1

Wistron Incorporated
2

C77 C64
SC10U10V5ZY-1GP SC1U10V3ZY-6GP 100R2J-2-GP 21F, 88, Sec.1,Hsin Tai Wu Rd
2
2

CPU_FANTACH1_1 1 R120 2 CPU_FANTACH1 Hsichih, Taipei Hsien

CPU FAN
1

Title
C71 (R) SIO ITE8757E / FAN / PS2 KBMS
SCD1U16V2ZY-2GP
2

Size Document Number Rev


C AIO eMARR 1A

Date: Tuesday, June 29, 2010 Sheet 23 of 31


5 4 3 2 1
5 4 3 2 1

Height: 8mm
T-CONN: 62.10043.A31 V_1P5_CORE

TYCO: 62.10043.511 Please close to MPE1.

1
V_1P5_CORE C193 C231 C228
MPE1 SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SC10U10V5ZY-1GP
SMB

2
6 13 CLK_PCIE_MINI1_DP
SMB_DATA_MAIN 1.5V REFCLK+ CLK_PCIE_MINI1_DN
6,11,13,17 SMB_DATA_MAIN REFCLK- 11
SMB_CLK_MAIN 2
6,11,13,17 SMB_CLK_MAIN 3.3V
23 PCIE_RXN_MINI1
PLTRST_MPE PERN0 PCIE_RXP_MINI1
23 PLTRST_MPE 28 +1.5V PERP0 25
D
3D3V_S0 48 D
+1.5V PCIE_TXN_MINI1
PETN0 31
52 33 PCIE_TXP_MINI1 3D3V_S0
+3.3V PETP0
24 36 USBP6- Please close to MPE1.
+3.3VAUX USB_D- USBP6+
USB_D+ 38
(R)

1
3 30 M1_SMB_CLK 0R2J-2-GP 2 1 R375 SMB_CLK_MAIN C196 C240 C392 C179
RESERVED#3 SMB_CLK
Mini PCIE Slot 1 5
8
RESERVED#5 SMB_DATA 32 M1_SMB_DATA 0R2J-2-GP 2 1 R371
(R)
SMB_DATA_MAIN SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP SC10U10V5ZY-1GP SC10U10V5ZY-1GP

2
CLK_PCIE_MINI1_DP RESERVED#8
6 CLK_PCIE_MINI1_DP 10 RESERVED#10
6 CLK_PCIE_MINI1_DN CLK_PCIE_MINI1_DN 12 1 W 1_W AKE_N TP49 TPAD28
RESERVED#12 WAKE#
14 RESERVED#14 CLKREQ# 7
16 22 PLTRST_MPE1 1 2 PLTRST_MPE
RESERVED#16 PERST# PLTRST_MPE 23
PCIE_RXN_MINI1 17 R383
15 PCIE_RXN_MINI1 RESERVED#17
PCIE_RXP_MINI1 19 0R0402-PAD
15 PCIE_RXP_MINI1 RESERVED#19
PCIE_TXN_MINI1 W 1_DISABLE_N 20 4
15 PCIE_TXN_MINI1 RESERVED#20 GND
PCIE_TXP_MINI1 37 9
15 PCIE_TXP_MINI1 RESERVED#37 GND
39 RESERVED#39 GND 15

W 1_DISABLE_N
41
43
RESERVED#41 GND 18
21
Mini PCIE holder STAND
17 W 1_DISABLE_N RESERVED#43 GND
45 RESERVED#45 GND 26 87.61493.235 -> 5.5mm
47 RESERVED#47 GND 27
49 RESERVED#49 GND 29 87.00A52.220 -> 3.3mm
51 RESERVED#51 GND 34
GND 35
GND 40
42 50 H3 H4
LED_WWAN# GND HOLE236R102 HOLE236R102
44 LED_WLAN# GND 53
C 46 54 (87.61493.235) (87.61493.235) C

NP1
NP2
USBP6- LED_WPAN# GND
15 USBP6-
USBP6+
15 USBP6+
SKT-MINI52P-31-GP

NP1
NP2
(62.10043.A31)

1
1
HOLE205R102

U41 (V) 5V_S0 2010/05/01


SERIAL PORT (V) C616
SCD1U10V2MX-3GP 1
(V) power noise

23 COM_RXD1 2COM_C1+ 28 C1+ VCC 26 C621 1 2 SC1U10V3ZY-6GP


COM_C1- 24
23 COM_TXD1 C1-
23 COM_RTS*1 (V) C619 27 (V) C6182 1 SCD1U10V2MX-3GP (V)
V+ (V) C6202
23 COM_CTS*1
SCD1U10V2MX-3GP 1 2COM_C2+ 1 C2+ V- 3 1 SCD1U10V2MX-3GP COM_CN1
23 COM_DTR*1 COM_C2- 2 C2- RDCD*1
23 COM_DSR*1 2 X 1
22 4 RCTS*1
23 COM_DCD*1 FORCEOFF# RIN1 RDSR*1 RDSR*1 RRXD1
23 COM_Rl1# 5V_S0 23 FORCEON RIN2 5 4 3
6 RRXD1 RRTS*1 6 5 RTXD1
17 SER_RI* RIN3 RDCD*1 RCTS*1 RDTR*1
21 INVALID# RIN4 7 8 7
20 8 RRI*1 RRI*1 10 9
ROUT2B RIN5
B COM_CTS*1 RDTR*1 DVD-CONN10D-FP20GP B
19 ROUT1 DOUT1 9
COM_DSR*1 18 10 RRTS*1
COM_RXD1 ROUT2 DOUT2 RTXD1
17 ROUT3 DOUT3 11
COM_DCD*1 16
COM_Rl1# ROUT4 COM_DTR*1 2010/05/01
15 ROUT5 DIN1 14
13 COM_RTS*1
DIN2 COM_TXD1
25 GND DIN3 12

1
1
1
1

1
1
SER_RI* 17

1
(V)
MAX3243CDBR-GP-U R984

2
2
2
2

2
2
10KR2J-3-GP

3
(V)

2
C600 C604 RRI*1_SER 1 Q108
SC180P50V2JN-1GP SC180P50V2JN-1GP PMBS3904-1-GP

1
(R) C601 (R) C605 (V)

2
SC180P50V2JN-1GP SC180P50V2JN-1GP R985
(R) C602 (R) C606 10KR2J-3-GP
SC180P50V2JN-1GP SC180P50V2JN-1GP
(R) C603 (R) C607

2
SC180P50V2JN-1GP SC180P50V2JN-1GP
(R) (R)

A A

Wistron Incorporated
21F, 88, Sec.1,Hsin Tai W u Rd
Hsichih, Taipei Hsien
Title
MINI-PCIE SLOT/COM PORT
Size Document Number Rev
A3 AIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 24 of 31


5 4 3 2 1
5 4 3 2 1

6 CLK_PCIE_CR_DP
6 CLK_PCIE_CR_DN
CLK_PCIE_CR_DP
CLK_PCIE_CR_DN
(SD, SDHC, MMC, MS, MS_Pro, XD)
PCIE_RXP_CR
15 PCIE_RXP_CR
PCIE_RXN_CR
15 PCIE_RXN_CR
PCIE_TXP_CR
15 PCIE_TXP_CR
PCIE_TXN_CR
15 PCIE_TXN_CR

D D

PLTRST_CR
23 PLTRST_CR

XD_RE#
XD_D4
XD_D5
XD_D6
XD_D7
V_3_CARD
MEM_CARD1
20MILS 13 24_2 XD_CD#
VCC C/D_XD XD_RDY
41 VCC_XD R/B_XD# 25
6 26 XD_RE#

36
35
34
33
32
31
30
29
28
27
26
25
VDD_SD RE_XD#

1
U6 27 XD_CE#
C83 C89 CE_XD# XD_CLE
28

GND
GND
GND
NC#36
NC#35
NC#34

NC#30
MDIO8
MDIO9
MDIO10
MDIO11
MDIO12
SD_DAT0 9 CLE_XD XD_ALE

SC10U10V5ZY-1GP
29

SCD1U16V2ZY-2GP
2

2
V_1P8_CR SD_DAT1 10 DAT0_SD ALE_XD XD_WE#
DAT1_SD WE_XD# 30
2009/11/11 SD_DAT2 2 31 XD_WP#
SD_DAT3 3 DAT2_SD WP_XD#
C314 2 SD_CD# 1 CD/DAT3_SD XD_D0
1 SCD1U16V2ZY-2GP 37 DV18 GND 24 CD_SD D0_XD 33
38 23 XD_RDY 3D3V_S0 SD_CLK 7 34 XD_D1
NC#38 MDIO13 XD_ALE SD_CMD 4 CLK_SD D1_XD XD_D2
39 SEEDAT MDIO14 22 CMD_SD D2_XD 35
3D3V_S0 XD_CLE SD_WP 11 XD_D3
40 MDIO7 CR1_LED# 21 40MILS WP_SD D3_XD 36
C
MDIO5 R600 1 2
MDIO6
MDIO5_C
41
42
MDIO6
MDIO5
JMB385 DV33
DV33
20
19
D4_XD
D5_XD
37
38
XD_D4
XD_D5
C

22R2J-2-GP MDIO4 43 18 MS_D119 39 XD_D6


MDIO4
VERSION C DV18 V_1P8_CR DATA1 D6_XD

1
44 17 V_3_CARD MS_D217 40 XD_D7
DV33 CR1_PCTL# DATA2 D7_XD

1
MDIO3 SD_CD# MS_D3
40MILS 45 MDIO3 CR1_CD0# 16 C302 C306 C310 15 DATA3
1

MDIO2 46 15 MS_INS# MS_BS20

2
C311 MDIO1 MDIO2 CR1_CD1# XD_CD# MS_CLK BS
47 MDIO1 CR1_CD2# 14 14 12

2
MDIO0 SC10U10V5ZY-1GP MS_D0 18 SCLK VSS
48 13 21
2

SCD1U16V2ZY-2GP MDIO0 CPPE# SCD1U16V2ZY-2GP MS_INS# 16 SDIO/DATA0 VSS


INS VSS_SD 5
SCD1U16V2ZY-2GP 8
VSS_SD

APCLKN

APREXT
(78.10620.51L)

APCLKP
22

APGND
APVDD

APRXN
APRXP

APTXN
APTXP
XTEST
XRST#

APV18
2009/11/11 2010/06/09 GND
NP1 NP1 GND 23
Card reader function fail when NP2 24_1
high temperature NP2 GND_XD
GND_XD 32
JMB385-LGEZ0C-GP Mount to fix regulate 1.8V
1
2
3
4
5
6
7
8
9
10
11
12
PEX_REXT V_1P8_CR power when high temperature
SKT-MSX039-A0-1-GP

40MILS (62.10051.691)
2

PLTRST_CR R171
CLOSE TO PIN 5 CLOSE TO PIN 10
9K1R2F-1-GP
B B

1
C301 C300
1

CLK_PCIE_CR_DN C313
CLK_PCIE_CR_DP C298 SCD1U16V2ZY-2GP

2
2

2
SC10U10V5ZY-1GP MDIO6 SD_WP XD_WP#
(78.10620.51L) (78.10520.5FL)
PCIE_TXP_CR SC1KP50V2KX-1GP MDIO5 SD_CLK MS_CLK XD_CE#
PCIE_TXN_CR SCD1U16V2ZY-2GP
2010/06/15 MDIO4 SD_CMD XD_WE# MS_BS
Card reader function fail when
PCIE_RXN_CR C96 1 2 SCD1U10V2MX-3GP PCIE_CR_TXN high temperature MDIO3 SD_DAT3 MS_D3 XD_D3
PCIE_RXP_CR C95 1 2 SCD1U10V2MX-3GP PCIE_CR_TXP Mount to fix regulate 1.8V
power when high temperature MDIO2 SD_DAT2 MS_D2 XD_D2

MDIO1 SD_DAT1 MS_D1 XD_D1

MDIO0 SD_DAT0 MS_D0 XD_D0


Power-on strapping setting
XD_RE#
3D3V_S0
2009/11/11
XD_CLE R161 1 2 10KR2J-3-GP
V_3_CARD XD_ALE
A A
MDIO6 R127 1 Wistron Incorporated
2 10KR2J-3-GP
MDIO4 R122 1 2 10KR2J-3-GP XD_CD# R159 1 2 4K7R2J-2-GP 21F, 88, Sec.1,Hsin Tai Wu Rd
XD_RDY R258 1 2 1KR2J-1-GP MS_INS# R149 1 2 4K7R2J-2-GP Hsichih, Taipei Hsien
SD_CD# R165 1 2 4K7R2J-2-GP
Title
1

C407
CARD READER JMB385C
SC270P50V2JN-2GP Size Document Number Rev
2

(R) B AIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 25 of 31


5 4 3 2 1
5 4 3 2 1

DC-IN Connector
DC_IN
(19V) DC_19V
DC-IN Connector
PWR1
4 U27 (19V)
1 DC_IN 1 S D 8
2 2 S D 7
3 3 S D 6 DC_19V

1
C322 C321 4 G D 5

1
D 5 SCD1U50V3ZY-GP SCD1U50V3ZY-GP DC_TP1 D

200KR2J-L1-GP
6 R582 C251 AO4407A-GP TPAD28

1
D9 SC1U50V5ZY-1-GP
Put together,

1
NP1 P6SBMJ24APT-GP
(78.10424.2BL) (78.10424.2BL) R584 with 3x3mm pad.

1
DC-JACK200-GP 20KR3J-1-GP

A
C253 GND_TP1
AD+_2 SCD1U50V3KX-GP TPAD28

2
2009/12/02

1
R585
100KR2J-1-GP

2
2010/05/01 3D3V_S0

Rising time

R1002

1
2 1 (R)
33R2J-2-GP R144 R145
(R) 1KR2J-1-GP

1KR2J-1-GP
C C
DACB_HSYNC 5V_S0 (R)
14 DACB_HSYNC
DACB_VSYNC
14 DACB_VSYNC

2
(D) U42

8 1
5V_S0 R1003 VCC 1OE# DACB_HSYNC
7 2
DACB_RED DACB_HSYNC_C0 HSYNC_3P3V_125 2OE# 1A
14 DACB_RED 2 1 6 3
DACB_GREEN 33R2J-2-GP 1Y 2Y
14 DACB_GREEN 5 4
DACB_BLUE (D) 2A GND
14 DACB_BLUE
SSLVC2G125DP-1GP

2
I2CB_SCL (D) F6
14 I2CB_SCL
I2CB_SDA POLYSW-1D5A6V-3-GP DACB_VSYNC
14 I2CB_SDA
R1004
DACB_VSYNC_C0 2 1 VSYNC_3P3V_125

1
33R2J-2-GP
(D)
VGA_PWR_F R1005
2 1

2
5V_S0 33R2J-2-GP
L59 (R)
MLB-201209-8-GP OE*
(D63.R0031.16L)

2
1 D13 R1006
(D83.04148.C1H) 1KR2J-1-GP
1N4148W-7-F-GP (D)
VGA_DDC_PU

1
2

(D)

1
C611 (D)
SCD1U16V2ZY-2GP (D) R995 R996
1

(D) 2K2R2J-2-GP 2K2R2J-2-GP


CRT2
VGA_PWR 2 1

2
B B
4 X 3
DACB_RED (D68.00217.361) L60 1 2 FCM1608KFG-301T05-GP DACB_RED_C 6 5 I2CB_SCL
DACB_GREEN (D68.00217.361) L61 1 2 FCM1608KFG-301T05-GP DACB_GREEN_C 8 7 I2CB_SDA
DACB_BLUE (D68.00217.361) L62 1 2 FCM1608KFG-301T05-GP DACB_BLUE_C 10 9 DACB_VSYNC_C L63 1 2 (D63.00000.00L) FCM1608KFG-301T05-GP DACB_VSYNC_C0
12 11 DACB_HSYNC_C L64 1 2 (D63.00000.00L) FCM1608KFG-301T05-GP DACB_HSYNC_C0

DVD-CONN12D-FP12GP
2010/05/01
2

R992 R993 R994


1

1
1

(D) (D) (D) (D) (D) (D) C612 C613 C614


C622 C623 C624 2010/05/01
SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP

(D78.22034.1FL)

(D78.22034.1FL)
(D78.22034.1FL)
1

2
2

SC5D6P50V2CN-1GP SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
150R2F-1-GP

150R2F-1-GP

150R2F-1-GP

3D3V_S0
1

5V_S0 5V_S0
A C615 A
SCD1U16V2ZY-2GP
2

(R)
BAV99-4-GP BAV99-4-GP
U40
2 2
DACB_RED 5 4 DACB_VSYNC
I2CB_SDA 3 I2CB_SCL Wistron Incorporated
3
DACB_GREEN 6 3 21F, 88, Sec.1,Hsin Tai Wu Rd
(R) 1 (R) 1 Hsichih, Taipei Hsien
7 2
D14 Title
DACB_BLUE 8 1 DACB_HSYNC D15 19VDC POWER JACK/VGA CON
Size Document Number Rev
PACDN009MR-GP-U CustomAIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 26 of 31


5 4 3 2 1
A B C D E

V_3D3V_ALW

ICH_RSMRST_N
2009/11/17
17,23 ICH_RSMRST_N

1
SLP_S5_N R425
17 SLP_S5_N
1KR2J-1-GP
R424
PWRBTN_N_OUT 33R2J-2-GP

2
23 PWRBTN_N_OUT PWRBTN1_N PWRBTN_N
1 2
3V_5V_EN
28 3V_5V_EN V_3D3V_ALW
Power Botton 2009/11/17

1
C258

1
SCD1U16V2ZY-2GP

2
R343 (R)
4 4
10KR2J-3-GP

0R2J-2-GP

2
R352
0R2J-2-GP 1 2 PWRBTN_N_OUT
PWRBTN_N_OUT 23
(R) R351
1 2
S R
SIO_SUSLED_N EUP V_3D3V_ALW

D
23 SIO_SUSLED_N
Q28
G3->S0 L->H H 2-3: AC In ON Mount R355

1
2N7002-11-GP
G (R84.2N702.D31)
R350
10KR2J-3-GP (E)
G3->S5->S0 H L->H 1-2: AC In OFF Mount R356

S
(E) U14 V_3D3V_ALW

2
PCB MOUNTING HOLES EUP_B0_1
1
2
NC#1 VCC
5
V_3D3V_ALW V_3D3V_ALW V_3D3V_ALW V_3D3V_ALW
A EUP_B0_2
3 4 U13
GND Y

1
GEN315R158-8-F-A GEN315R158-8-F-A 1 6 3V_5V_EN R347 R346
B1 S 3V_5V_EN 28

1
C187 74LVC1G14GW-GP 2 5 10KR2J-3-GP 10KR2J-3-GP R345
GND VCC V_3D3V_ALW
H1 H11 SC4D7U10V3KX-GP [Inverter] 3 4 (E) (E) 10KR2J-3-GP

2
B0 A
3

(E) U12 (E)


4 4

2
1 1 EUP_CP 1 8

2
(E) NC7SB3157P6X-2GP EUP_D 2
CP VCC
7 EUP_S#D
D SD#

2
5 8 5 8 3 6 EUP_R#D
V_3D3V_ALW !" # Q# RD# R355
4 5
S= 0 --> A = B0 GND Q
0R2J-2-GP
S= 1 --> A = B1 (R)
6

1
74LVC2G74GD-GP EUP_RS#D

2 1
(E)
(E) R349
3 10KR2J-3-GP R356 3
0R2J-2-GP

2
GEN315R158-8-F-A GEN315R158-8-F-A (R)
High: S0,S3,S4

1
H7 H2 EUP_B1_3
3

Low:S5

1
4 4 C186 (E)
1 1 SC4D7U10V3KX-GP

2
5 8 5 8 Q31
2N7002-11-GP
ICH_RSMRST_N G (E84.2N702.D31)
6

ICH_RSMRST_N1
B0 B1 A 3V_5V_EN
GEN315R158-8-F-A
S5 L H L(B0) L
D

H12
3

Q32
4 2N7002-11-GP
SLP_S5_N
1 G (E84.2N702.D31)
S5->S0 H->L H(B0->B1) L->H
1

5 8
S

R372
10KR2J-3-GP
S0 L L L(B1) H
6

(E)
2

S0->S5 X L->H H(B1->B0) H->L

S0->S4 X L H H
2 2

G10
VCC5_USB 1 2 V_5_LED

COPPER-CLOSE
VCC5_USB

1
R407
10KR2J-3-GP
SUSPEND LED

2
2 Q37
PMBS3906-GP
1 SUSLED_1 1 2 SIO_SUSLED_N
SWLED2 5V_S0 R409
2 1 PWRBTN1_N 2K2R2J-2-GP
3SUSLED_CON_P1

(63.24234.1DL)
4 3 SIDELED1_PWR R423 2 1 0R0603-PAD SIDELED1_PWR_1 1 R652 2 (R) 200R5J-GP
6 5 SIDELED2_PWR R417 2 1 0R0603-PAD SIDELED2_PWR_1 1 R653 2 (R) 200R5J-GP
8 7 PWRLED_CON R414 2 1 0R0603-PAD V_5_PWR1 1 R415 2 200R5J-GP
10 9 SUSLED_CON (63.13131.16L)
2009/12/01
1

JWT-CONN10D-S8-GP 2010/06/24
Customer approve to R413 2009/12/01
make LED more bright by 200R5J-GP
change resistor
1 20100115 1
2

V_5_SUS1
1

R411
0R0603-PAD
Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
2

SUSLED_CON Title
ADAPTER/HOLES
Size Document Number Rev
C AIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 27 of 31


A B C D E
5 4 3 2 1

+3VSB/+5VSB DC_19V
R319
V_19_3_5V V_19_3_5V
DC_TP3
0R0805-PAD
DC_TP2 1 2
TPAD28 R322 84.04468.037 AO4468

1
V_19_3_5V 0R0805-PAD
84.04468.037 AO4468 2010/01/15 1 2
TPAD28 Vgs @ 4.5V,
27 3V_5V_EN
3V_5V_EN
Vgs @ 4.5V,
R320 R299 2010/01/15 Id = 10A,
0R0805-PAD 2D2R5J-1-GP
SLP_S3_N Id = 10A, 1 2 V_19_3_5V Rds(on) = 17.4~22mohm,
17,23,29,30 SLP_S3_N

2
Rds(on) = 17.4~22mohm, R321 (78.47512.51L) (78.47512.51L) Qg = 9~12nC
SLP_S4_N (78.47512.51L) 0R0805-PAD V_19_3_5V_VIN
8,17,23,29 SLP_S4_N
Qg = 9~12nC C161 1 2 84.04718.037 AO4718

1
C163 SC10U10V5KX-2GP
Vgs @ 4.5V,

1
1
C147 C169 C168 C170

1
SCD01U50V2KX-1GP
84.04718.037 AO4718 SCD1U50V3KX-GP SCD01U50V2KX-1GP Id = 12A,

SC10U10V5KX-2GP

SC10U10V5KX-2GP
D D

8
7
6
5

5
6
7
8
2010/05/19
Vgs @ 4.5V, Rds(on) = 10.8~14mohm,

2
2

D
D
D
D
D
D
D
D
Change symbol AO4468-GP Q21

2
Id = 12A, Q22 (84.04468.A37) Qg = 12~16nC

16
C162 AO4468-GP U11
Rds(on) = 10.8~14mohm, SC10U10V5KX-2GP (84.04468.A37)

VIN
Qg = 12~16nC (78.47512.51L)

G
S
S
S
C144 SCD1U50V3KX-GP R275 R309 C157

S
S
S
G
2D2R5J-1-GP 2D2R5J-1-GP SCD1U50V3KX-GP

1
2
3
4

4
3
2
1
1 2 8205A_BOOT2_R 1 2 8205A_BOOT2 9 22 8205A_BOOT1 1 2 8205A_BOOT1_R 1 2
3D3V_S5 3D3V_PWR IND-3D3UH-116-GP BOOT2 BOOT1 5V_PWR 5V_S5
R267
L15
8205A_UGATE2_R R323 1 2 2D2R5J-1-GP 8205A_UGATE2 10
UGATE2 UGATE1
21 8205A_UGATE1 R312 1 2 2D2R5J-1-GP 8205A_UGATE1_R Iomax=5A R316
0R0805-PAD C156 0R0805-PAD
1 2 1 2 8205A_PHASE2 11 20 8205A_PHASE1 1 2 SC1U10V3ZY-6GP 1 2
PHASE2 PHASE1 R315
R271 TC6 Iomax=3A 8205A_LGATE2_R R571 1 2 0R0805-PAD 8205A_LGATE2 12 19 8205A_LGATE1 R580 1 2 8205A_LGATE1_R IND-3D3UH-135-GP 0R0805-PAD
LGATE2 LGATE1

1
0R0805-PAD E820U2D5VM-6-GP 0R0805-PAD L17 1 2

8
7
6
5
1 2 C627 R314

5
6
7
8
D
D
D
D
SC10U10V5ZY-1GP 8205A_VO2 7 24 8205A_VO1 G8 0R0805-PAD
2

1
VO2 VO1

D
D
D
D
R273 (09.56710.A5L) Q24 1 2

GAP-CLOSE-PWR-3-GP
0R0805-PAD G5 Q19 8205A_FB2 5 2 8205A_FB1 AO4718-GP TC10 C626 R313
AO4718-GP FB2 FB1 E820U2D5VM-6-GP SC10U10V5ZY-1GP 0R0805-PAD
1 2

2
GAP-CLOSE-PWR-3-GP
2010/05/07 (84.04718.A37) R285 1 2 820KR2F-GP (64.47025.6DL) (84.04718.A37) (09.56710.A5L) 1 2

2
R284 1 2 100KR2J-1-GP 8205A_EN 13 23

S
S
S
G
V_19_3_5V EN PGOOD
2009/11/16 2009/11/16

G
S
S
S
C142

1
2
3
4
SC1U10V3ZY-6GP 100uF 8205A_ENTIP2 6 1 8205A_ENTIP1 220uF 2010/05/07

4
3
2
1
ENTRIP2 ENTRIP1
8205A_VREF 3 15
8205A_VREF VREF PGND
C150 SCD22U6D3V2KX-1GP 8205A_TONSEL 4 25
TONSEL GND
2 1

8205A_SKIPSEL 14 18
R303 1 SKIPSEL NC#18
V_3D3V_ALW 2 0R2J-2-GP

1
(R)

VREG3

VREG5
1
Close to VFB 8205A_VREF R307 1 2 0R0402-PAD-1-GP

1
Pin (pin5)
R290
Close to VFB

1
R294 0R2J-2-GP R300 1 2 0R2J-2-GP (R)
6K65R2F-GP (R) (R) RT8205AGQW-GP-U R310 Pin (pin2)

17
8205A_FB2_R 0R2J-2-GP R311
2 V_3D3V_ALW R288 1 2 0R0402-PAD-1-GP 30KR2F-GP

2
1
C C146 8205A_FB1_R C

2
SC18P50V2JN-1-GP 8205A_VREF R287 1 2 0R2J-2-GP
(R) (R)

1
R291 1 2 0R2J-2-GP C152
(R) SC18P50V2JN-1-GP
1

(R)
G7

2
R295 V_3D3V_ALW G6 1 2 3D3V_AUX_8205A 5V_AUX_8205A 1 2 V_5_ALW

1
10KR2F-2-GP GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP
2

1
C143 C151 R308
SC10U10V5ZY-1GP SC10U10V5ZY-1GP 20KR2F-L-GP

2
GND VREF VREG3 VREG5
OCP
(64.86625.6DL)
8205A_ENTIP1 R292 1 2 100KR2F-L1-GP

SKIPSEL PWM SKIP 00A AUTOSKIP 00A AUTOSKIP Q17 (R)


(64.47025.6DL)
8205A_ENTIP2 R286 1 2 62KR2F-GP 8205A_ENTIP2 6 1

TONSEL 200k/CH1 330k/CH1 400k/CH1 400k/CH1 V_3D3V_ALW (E) 1 2 SYS_EN1 5 2 SYS_EN1


250k/CH2 375k/CH2 500k/CH2 500k/CH2 R296 10KR2J-3-GP
4 3 8205A_ENTIP1

D
Q16 2N7002DW-1-GP
2N7002-11-GP
3V_5V_EN G (E84.2N702.D31)
27 3V_5V_EN
84.27002.D3F
Vgs(th)= 1~2.0V

S
TP69
TPAD28

B B

! "#
EUP: R330!
1 R330 2 V_3_5V_S0_EN
V_19_3_5V
0R0603-PAD
1

(R)
R257
47KR2J-2-GP
3D3V_S0 (84.04468.A37) 3D3V_S5
2

R262 Q15
1

3V_S0_EN_R 1 2 3V_S0_EN 4 5
R341
100KR2J-1-GP
10KR2J-3-GP 3
2
G
S
D
D 6
7 VCC5_USB
1

S D
1 8
D

S D
Q14 R261 C134 3D3V_S0
2

2N7002-11-GP 100KR2J-1-GP SCD1U50V3KX-GP AO4468-GP


(84.2N702.D31)
2

VCTRL_VCC_EN G
2

1
1

8/18 C141 C140 C135 C136


10KR2J-3-GP

TP48 R266
R561
S

SC1U10V3ZY-6GP

TPAD28
SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP
2

2
2

Q30 1 2 19V_USB_EN
V_19_3_5V
D

2N7002-11-GP
2
1

(84.2N702.D31) 0R0402-PAD-1-GP
R342

1
SLP_S3_N G 100KR2J-1-GP
R550
V_3_5V_S0_EN 47KR2J-2-GP (84.04468.A37) 5V_S5
S

R558 Q45
5V_S0
2
R327 USB_EN2 1 2 USB_EN 4 5
1

G D
33KR2J-3-GP 10KR2J-3-GP 3 S D 6
(84.04468.A37) 5V_S5 2 7

1
S D
R567 C375 1 8
D
2

S D
R317 Q18 100KR2J-1-GP Q46 R549 SCD1U50V3KX-GP
5V_S0_EN_R 1 2 5V_S0_EN 4 5 2N7002-11-GP 100KR2J-1-GP AO4468-GP VCC5_USB
2

2
10KR2J-3-GP
G D TP68 (84.2N702.D31)
3 6
2
S D
7 TPAD28 USB_EN1 G VCC5_USB

2
1

S D
1 8
D

1
A Q27 R328 C155
S D
5V_S0 A
S

2N7002-11-GP 100KR2J-1-GP SCD1U50V3KX-GP AO4468-GP R566 R548


D

(84.2N702.D31) Q44 100KR2J-1-GP 4K7R2J-2-GP


2

G 2N7002-11-GP
2

1
1

Discharge
8/18 C154 C153 C149 C148 (84.2N702.D31)
2

2
1

SLP_S4_N G resistor when


10KR2J-3-GP
S

SC1U10V3ZY-6GP
SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

R297 shut down


SCD1U16V2ZY-2GP
2

2
2

Wistron Incorporated
2

2009/11/04 21F, 88, Sec.1,Hsin Tai Wu Rd


Hsichih, Taipei Hsien
Title
RT8205A_3V&5V
Size Document Number Rev
A2 AIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 28 of 31


5 4 3 2 1
5 4 3 2 1

DC_19_1D5V

DC_19V

5V_S5
SIO 0R0805-PAD 2 1 R305

SLP_S4_N 0R0805-PAD 2 1 R304


8,17,23,28 SLP_S4_N
(78.47512.51L) (78.47512.51L)

1
SLP_S3_N Q20 C166 C164 C165

1
17,23,28,30 SLP_S3_N R581 NTD4809NT4G-GP D SC10U10V5KX-2GP SC10U10V5KX-2GP

SCD1U50V3KX-GP
0R0805-PAD 0R0805-PAD 2 1 R306

2
+1.5V_S3

2
8209A_1D8UGATE R572 1 2 1.8V_UG12 G 1

2
D C391 2D2R5J-1-GP D
SC1U16V3KX-2GP

3
Imax=18A

1
C595 R575 1 2 249KR2F-GP S 2010/01/15

1
SC10U10V5KX-2GP
8209A_PGOOD R576 R574
8 8209A_PGOOD 2D2R5J-1-GP 2D2R5J-1-GP C385 1D5V_PWR

2
U26 RT8209AGQW-GP SCD1U50V3KX-GP L16 1D5V_S3

2
8209A_1D8TON 16 13 8209A_1D8BOOT 1 2 1D8BOOT_1 2 1 COIL-1UH-33-GP
20100119 TON BOOT 8209A_1D8UGATE C145
12
8209A_1D8VDDP UGATE 8209A_1D8PHASE SCD1U16V2ZY-2GP R283 1
9 11 1 2 2 0R0805-PAD
8209A_1D8VDD VDDP PHASE 8209A_1D8LGATE
2 8
VDD LGATE R282 1
7 2 0R0805-PAD
PGND

1
C388 R578 10KR2F-2-GP Q23

E820U2D5VM-6-GP
1

1
SC1U16V3KX-2GP 8209A_PGOOD 4 3 8209A_1D8FB 1 2 NTD4806NT4G-GP R281 1 2 0R0805-PAD

2
8209A_1D8CS PGOOD FB 8209A_1D8VOUT D R318 TC8
10 1

NC#17
2
CS VOUT (64.10525.6DL) 2010/05/01 R280 1
14 2D2R5J-1-GP 2 0R0805-PAD

GND
R324

2
1

1
NC#14
15 5
R577 EN/DEM NC#5 C390 (R) 1.8V_LG12 G R279 1
1 2 1 2 0R0805-PAD

2
20KR2F-L-GP 2 1 G12

1D8V_PWR_EN

6
17
GAP-CLOSE-PWR R278 1 2 0R0805-PAD

11D8V_LX1_SNB
3

2
(R) SCD1U10V2MX-3GP 0R0805-PAD-1-GP

1
C386 S R277 1 2 0R0805-PAD

1
C389 (R)

SCD1U10V2MX-3GP
R579

SCD1U10V2MX-3GP
10KR2F-2-GP

2
2
7/3 C167 2009/11/15
SLP_S4_N 1 2 SC1500P50V3KX-GP
R573 0R0402-PAD

2
1
C387 (R)
SCD1U10V2MX-3GP Vout=1.5V

2
Vout = 0.75*(1+R_Top/R_GND)

C C

3D3V_S0
1D5V_S3
V_1P5_CORE
3D3V_S0
DC_19V
DC_19V
1

1
C87 C86 DC_19V

1
1
R487 SC4D7U10V5ZY-3GP SCD1U10V2MX-3GP C79 C80
1

1
(84.27002.C3F) 17K4R2F-GP SC4D7U10V5ZY-3GP SCD1U10V2MX-3GP

2
R491 (74.00358.X11) R485
Q42

2
2
2
47KR2J-2-GP U23B 15KR2F-GP (74.00358.X11)
2

2
LM358DR2G-GP D U23A

8
1 6 V_1D5V_EN 5 Q12 LM358DR2G-GP D
+
2

2
7 V_1D5_CNTL_FET 1 G AOD452AL-GP V_1D05_EN 3 + Q10
V1P5SB_EN_N 2 5 V1P5SB_EN 6 S (84.04809.036) 1 V_1D05CNTL_FET 1 G AOD452AL-GP
-
+1.5V / 12.35A
1

2 S (84.04809.036)
3
-
+1.05V / 8.3A
1

1
1

3 4 R486 C304
4

3
1

1
R490 R483 R488 C303

4
SC1U6D3V2KX-GP
14K7R2F-L-GP

100KR2J-1-GP 1KR2J-1-GP R484


(64.15025.6DL)

7K15R2F-L-GP

SC1U6D3V2KX-GP
2N7002DW-1-GP 1KR2J-1-GP
2

2
V_1P5_CORE V_1P05_CORE

2
2

2
3D3V_S0 R489 2 1 10KR2J-3-GP
1
1

C297 C85 2009/11/26

1
1
1
SLP_S3_N R508 2 1 0R2J-2-GP SC10U10V5ZY-1GP TC3 C299 C84
SCD1U10V2MX-3GP

(R) E820U2D5VM-6-GP SC10U10V5ZY-1GP TC1 TC9


2
2

SCD1U10V2MX-3GP
(R) E820U2D5VM-6-GP E820U2D5VM-6-GP

2
2
1

C308 (R) (R)


SC1U10V3KX-3GP
2009/11/15
2

2009/11/30
2009/11/15

B B
(74.09045.071)
U37
3D3V_S0 APL5336KAI-TRL-GP
5V_S5 2010/05/04
Power sequence
C592 1 8
2010/01/15 SC10U10V5ZY-1GP VIN NC#8
2 7
GND NC#7
3 6
VREF VCNTL
4 5

GND

1
VOUT NC#5 C369
SC1U10V3ZY-6GP

2
9
3D3V_S0

1
Vout=5 x R2 / [ (R1+R2) ] R965
DDR2 MEM_VTT 8K2R2F-1-GP
R1 V_1P8_PLLSFR
(0.75V/1A)

2
1D5V_S3 5V_S5

(74.09045.071) Q10BV_G_P
U24 C597
1

1
1
APL5336KAI-TRL-GP (R09.1071D.G8L)

1
1D5V_S3 C372 5V_S5 R964 R966 C370 TC19 SC10U10V5ZY-1GP
SC10U10V5ZY-1GP 4K7R2F-GP 10KR2F-2-GP SC1U10V3ZY-6GP E100U16VM-41-GP

D
2

2
1 8 (63.47234.1DL) R2

2
1

VIN NC#8 Q29


2 7

2
GND NC#7 2N7002-11-GP
R539 3
VREF VCNTL
6 5V_S0 FROM V0.7/ P16
1KR2F-3-GP 4 5 Q10BV_G_N G (84.2N702.D31)
GND

VOUT NC#5 C366


2

SC1U10V3ZY-6GP

S
2

DDRVTT_REF R117
2
9

4K7R2F-GP Q8
1

C367 (63.47234.1DL) 2N7002-11-GP


R538 SC1U10V3ZY-6GP 5V_S5 Q10BV_G G (84.2N702.D31)
1

1KR2F-3-GP DDR_VREF_S3
2

S
A 5V_S5 A
2

R125 1 2 4K7R2F-GP R135 1 2 4K7R2F-GP


(R)
(63.47234.1DL) (63.47234.1DL)
1

1
1

C357 C325 C355 V_1P05_CORE


3

6
SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP
2

2
2

R116 1 2 1KR2J-1-GP Q28_P5 5 2 Q28_P23 SLP_S3_N R137 1 2 10KR2J-3-GP Q31_P5 5 2 Q31_P23


Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
4

1
1

1
1

Q7 Q9 Hsichih, Taipei Hsien


2009/11/20 C66 C68 MMDT3904-7-F-GP C78 (R) MMDT3904-7-F-GP
remove MLCC SCD1U16V2ZY-2GP SC1U10V3KX-3GP SC1U10V3KX-3GP Title
2

2
2

2009/11/15 (R)
remove TC
RT8209A_DDR1D5V/1D5V/1D05V
Size Document Number Rev
A2 AIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 29 of 31

5 4 3 2 1
5 4 3 2 1

SLP_S3_N
17,23,28,29 SLP_S3_N

GPU_THERM_SHUTDOWN*
14 GPU_THERM_SHUTDOWN*
2009/11/12 V_1P5_CORE

GPU VCORE -> MEMORY POWER

5
6
7
8
V_19_3_5V

D
D
D
D
Q55
AO4468-GP MEMORY DIE_S0

1
D
V_19_3_5V R450
33KR2J-3-GP
(G84.04468.A37)
2A D

G
S
S
S
(G)

4
3
2
1
R628 R432 (G) FBVDDQ
100KR2J-1-GP GPUPG_2 1 2 GPUPG_3
(G) 10KR2J-3-GP

1
D
2

1
Q56 R429 C178

E820U2D5VM-6-GP

1
2N7002-11-GP

100KR2J-1-GP

SCD1U50V3KX-GP
(G84.2N702.D31) (G) (G) TC15

2
GPUPG_1 G (G)

2
3D3V_S0
2010/05/01

S
1
Q57 power noise

2
2N7002-11-GP R562

D
(G) (G84.2N702.D31)

100KR2J-1-GP
R559 (G)
10KR2J-3-GP

2
8209A_GPUPD G

S
TPAD28
DC_TP5
DC_19_0D9V DC_19V

C 0R0805-PAD 2 R610 1 C

(G78.47512.51L) 0R0805-PAD 2 R609 1

5
6
7
8
Vds = 30 V (G) C205 C171

1
D
D
D
D
C173 (G78.47512.51L)
Q48

SC10U10V5KX-2GP

SC10U10V5KX-2GP
SCD1U50V3KX-GP
AO4468-GP 0R0805-PAD 2 R620 1

2
5V_S0 2009/12/03 (G84.04468.A37)

G
S
S
S
1

+0.9 V_S3

4
3
2
1
R623
0R0805-PAD (G)
8209A_0D9UGATE 1 R621 2 0.9V_UG12 2010/01/15
C414 2D2R5J-1-GP
Imax=11.3A
2

SC1U16V3KX-2GP (G)
R608 1 2 249KR2F-GP
1

(G) R613 (G) 2009/11/16


1

(G) 2D2R5J-1-GP C416 (G) 0D9V_PWR


R616 U28 RT8209AGQW-GP SCD1U50V3KX-GP IND-1UH-94-GP NVVDD
2D2R5J-1-GP 8209A_0D9TON 16 13 8209A_0D9BOOT 1 2 0D9BOOT_1 2 1 L33
2

(G) TON BOOT 8209A_0D9UGATE (G) C185 (G)


12
2

8209A_0D9VDDP UGATE 8209A_0D9PHASE SCD1U16V2ZY-2GP R611 1


9 11 1 2 2 0R0805-PAD
8209A_0D9VDD VDDP PHASE 8209A_0D9LGATE
2 8
VDD LGATE
PGND
7 Idc=11A R619 1 2 0R0805-PAD
1

C411

1
1

1
SC1U16V3KX-2GP 8209A_GPUPD 4 3 8209A_0D9FB (G) 1 R615 2 R624 1 2 0R0805-PAD
(G) 8209A_0D9CS PGOOD FB 8209A_0D9VOUT 2KR2F-3-GP R618 TC18 C625
10 1
2

NC#17

CS VOUT SC10U10V5ZY-1GP R625 1


14 2D2R5J-1-GP 2 0R0805-PAD
GND

2
NC#14

1
1

5
6
7
8
15 5 C413 (R) (G) (G) (G)
EN/DEM NC#5

D
D
D
D
R622 SCD1U10V2MX-3GP E820U2D5VM-6-GP R607 1 2 0R0805-PAD

2
0D9V_PWR_EN

20KR2F-L-GP 2 1 G15
6
17

(G64.15025.6DL) Q47 GAP-CLOSE-PWR R344 1 2 0R0805-PAD

10D9V_LX1_SNB

2
(R) 2009/11/15 2010/05/07
2

C417 AO4718-GP R378 1 2 0R0805-PAD


1

G
S
S
S
C412 (R) (G84.04718.A37)
SCD1U10V2MX-3GP

R614
2

4
3
2
1
SCD1U10V2MX-3GP
10KR2F-2-GP
2

B B
(G)
R612
2

2009/11/21 C181
R981
(G) 10KR2J-3-GP 1 2 0.9V_LG12 SC1500P50V3KX-GP
3D3V_S0 2 1 (G)

2
2009/11/20
0R0805-PAD-1-GP
Vout=0.9V
SLP_S3_N R617 1 (R) 2 0R2J-2-GP
NVVDD_SENSE
Vout = 0.75*(1+R_Top/R_GND)
1

C415 (R) R650 1 (R) 2 0R2J-2-GP


SCD1U10V2MX-3GP
2

GPU_THERM_SHUTDOWN* 1 2
R644 0R0402-PAD

2009/11/17

A A

Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Title
RT8209A_GPU CORE
Size Document Number Rev
C AIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 30 of 31


5 4 3 2 1
5 4 3 2 1

PNV
VCC_SENSE_CPU_SKT
10 VCC_SENSE_CPU_SKT
VSS_SENSE_CPU_SKT
10 VSS_SENSE_CPU_SKT

H_VID[6..0]
9 H_VID[6..0]

D D
TPT
ICH_VRMPWRGD_PU
6,17 ICH_VRMPWRGD_PU
Close to NCP5380 Close to NCP5380

3D3V_S0 V_1P05_CORE DC_19V V_19_VRM

V_19_VRM

2
G4 DC_TP4

1
R94 5V_S0 C10 1 2
R93 (R) 1KR2J-1-GP SCD1U50V3KX-GP 2010/01/15
10KR2J-3-GP GAP-CLOSE-PWR
(78.47512.51L)

1
TPAD28

1
1

1
V_1P05_CORE 3D3V_S5 CPUCORE_ON G3

2
R51 C7 C1 1 2
2D2R5J-1-GP R32 SC10U10V5KX-2GP

2
1

1
2D2R5J-1-GP (78.47512.51L) GAP-CLOSE-PWR

1
R114 R115 C41 SC10U10V5KX-2GP

2
2
2K2R2J-2-GP 10KR2J-3-GP SCD1U10V2MX-3GP G2

5
6
7
8
(R) (R) Q4 5380_PVCC 1 2

D
D
D
D
2N7002-11-GP

1
VR_N_EN G (R84.2N702.D31) C34 C22 Q3 GAP-CLOSE-PWR
3D3V_S0 SC1U16V3KX-2GP SC2D2U10V3KX-1GP AO4468-GP

CPUCORE_ON
G1

2
S
VR_EN_1 B (84.04468.A37) 1 2

G
S
S
S
C63 (R)

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
Q5 SCD1U10V2MX-3GP GAP-CLOSE-PWR

4
3
2
1
E
MMBT3904-3-GP R73

2
(R84.03904.L06) 10KR2J-3-GP BST1
DRVH1

2
U1

1
ICH_VRMPWRGD_PU C26

32
31
30
29
28
27
26
25

1
NCP5380MNTXG-GP SCD1U50V3KX-GP
R44 1.0uH, DCR=9.0mohm,

1
4K99R2F-L-GP (R) C39 2D2R5J-1-GP

VID1
VID2
VID3
VID4
VID5
VID6
VID7
EN
R46 SCD1U10V2MX-3GP R49 Idc=11A

2
2 1 10KR2J-3-GP

2
5380_VCC R60 IND-1UH-94-GP
C C30 1
VCC
24
23 5380_BST 2D2R5J-1-GP
L1
Imax=8A C

2
VSS_SENSE_CPU_SKT SCD1U50V3KX-GP 5380_IMON PWRGD BST 5380_DRVH
2 1 2 22 1 2
IMON DRVH 5380_SW
3 21 1 2 VCORE
R41 5380_FBRTN NC#3 SW 5380_PVCC
4 20
FBRTN PVCC

1
20R2F-GP 5380_FB 5 19 5380_DRVL
FB DRVL
1
C37 2 1 5380_COMP 6 18 R42
COMP PGND

5
6
7
8
SC1KP50V2KX-1GP 7 17 2D2R5J-1-GP
AGND AGND

D
D
D
D
C24 5380_ILIM 8 33 Q2
2
ILIM AGND

1
SCD1U10V2MX-3GP AO4718-GP

CSCOMP

2
VCORE 2 1 R3 R4

CSREF
RAMP
LLINE
100KR2F-L1-GP 10R2F-L-GP

CSFB
(84.04718.A37)

VCORE_SB
IREF
RPM
R43

RT
1

G
S
S
S
866R3F-GP

2
1
R35 5380_VCC 2 1

9
10
11
12
13
14
15
16

4
3
2
1
100R2F-L1-GP-U R21
R29 10KR2F-2-GP C16

1
1KR2F-3-GP (OCP=~12A) 5380_DRVL SC1500P50V3KX-GP
2

5380_CSREF
5380_RAMP
VCC_SENSE_CPU_SKT

5380_LLINE

5380_CSFB
2 1

5380_IRFE
5380_RPM
2
C11
7/3

5380_RT

2
2 1 SC22P50V2JN-4GP
R16 1 2 66K5R2F-GP
C18 C12 R8
SC220P50V2KX-3GP SC470P50V2KX-3GP 20KR2F-L-GP R11 100KR2F-L1-GP
2 R39 1 VCC_SENSE_CPU_SKT_R 2 1 2 1 5380_COMP_2 1 2 5380_CSCOMP 5380_CSCOMP R86 1 2 NTC-100K-4-GP 5380_CSCOMPFB 2 1
0R0402-PAD (R)

C9

1
C13 SC3300P50V2KX-1GP

1
SC1200P50V2KX-1GP (R)

2
1
1

2
1
R20 R7 C3 R19
80K6R2F-GP 200KR2F-L-GP 1 SCD1U50V3KX-GP 365KR2F-GP
(R) (64.20035.6DL)
2
2

2
2009/12/28

1
B VCORE B

C8

2
SC1KP50V2KX-1GP

2
R23
R6 R18 0R0402-PAD
1KR2J-1-GP 604KR2F-GP 2009/11/24

1
1
V_19_VRM 2 1 5380_RAMPIN 2 1

1
R5 (R) TC12 TC7
(64.43035.6DL) 1KR2J-1-GP E820U2D5VM-6-GP ST330U2D5VDM-9GP

2
2
1

C6 2 1 5380_CSCOMP (R)
SC1KP50V2KX-1GP
2009/12/28
2

V_1P05_CORE
2009/11/15
1

1
1

1
1

R83 R82 R81 R80 R79 R78 R77 C402


680R2J-3-GP 680R2J-3-GP 680R2J-3-GP 680R2J-3-GP 680R2J-3-GP 680R2J-3-GP 680R2J-3-GP SC10U6D3V5KX-1GP
2

9 H_VID[6..0] 7/14
2
2

2
2

H_VID0

H_VID1

H_VID2

H_VID3

H_VID4

H_VID5

H_VID6
A A
1

1
1

1
1

R72 R71 R70 R69 R68 R67 R66


0R2J-2-GP 0R2J-2-GP 0R2J-2-GP 0R2J-2-GP 0R2J-2-GP 0R2J-2-GP 0R2J-2-GP
(R) (R) (R) (R) (R) (R) (R)
2

2
2

2
2

Wistron Incorporated
21F, 88, Sec.1,Hsin Tai Wu Rd
Hsichih, Taipei Hsien
Title
NCP5380_VCORE
Size Document Number Rev
C AIO eMARR 1A

Date: Thursday, June 24, 2010 Sheet 31 of 31


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